Blog Review: Sept. 16

TSMC advanced packaging, specialty processes; auto pattern assessment; virtual prototyping.


Cadence’s Paul McLellan checks out what’s new for TSMC’s advanced packaging solutions and the ultra-low power, RF, eNVM, and CMOS image sensor specialty processes.

Mentor’s Ron Press points to an automated solution to measuring pattern value that provides a consistent, “apples to apples” assessment of patterns detecting defects based on the likelihood the physical defects occurring.

Synopsys’ Marc Serughetti and Johannes Stahl look at how virtual prototyping can speed the SoC software development process by allowing an earlier start and more productive debug and analysis.

Rambus’ Frank Ferro and IDC’s Shane Rau discuss how AI is needed to help deal with the rapidly increasing amount of data being generated plus the impact of COVID-19 on the data center market.

Ansys’ Theresa Duncan explores different aspects of designing for reliability, from careful selection of materials and components to failure analysis and accelerated life testing.

Arm’s Robert Iannello highlights a new, free online course covering the fundamentals of using Arm in embedded systems development.

In a video, VLSI Research’s Andrea Lati, Dan Hutcheson, John West, and Risto Puhakka discuss some key industry issues, including what’s next for SMIC, extreme low temperature processing, and the economics of the sub-fab.

In a blog for SEMI, Walt Custer of Custer Consulting finds the global electronic equipment industry recovering in the second half of the year with the predictable fall busy season.

Semico Research’s Rich Wawrzyniak examines Nvidia’s $40B acquisition of Arm and what it could mean for silicon IP as well as the data center and AI markets.

Plus, check out the blogs featured in the latest Low Power-High Performance newsletter:

Editor in chief Ed Sperling digs into why moving electricity is costly and solutions are still lagging.

Rambus’ Paul Karazuba advises that because roots of trust aren’t one-size-fits all, before adopting one it is important to evaluate your security needs.

Fraunhofer EAS’ Benjamin Prautsch examines the tension between creative, precise high-end layouts and firmly established tapeout deadlines.

Synopsys’ Ron Lowman looks at the factors driving the development of edge computing and the benefits it could provide to a network.

Rambus’ Vinitha Seevaratnam explains why rapidly rising data traffic and ever-greater bandwidth requirements are driving the need for new interfaces in the data center.

Mentor’s Akshay Sarup steps us through how to speed up the PCIe link training and initialization process, plus creating custom testbenches that can dynamically adapt to different IP topologies and configurations.

Arm’s Pierre-Alexandre Bou-Ach sees great potential to achieve better energy efficiency later in the IC development flow.

Moortec’s Lee Vick recounts how a gun made in a dungeon changed the world and how it relates to chip manufacturing.

Cadence’s Paul McLellan previews what’s new and upcoming from TSMC, including for automotive and advanced packaging.

Ansys’ Marc Swinnen points out that the world’s leading chip designers feature at the upcoming IDEAS Digital Forum show.

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