RISC-V Gains Its Footing


The RISC-V instruction-set architecture, which started as a UC Berkeley project to improve energy efficiency, is gaining steam across the industry. The RISC-V Foundation's member roster gives an indication who is behind this effort. Members include Google, Nvidia, Qualcomm, Rambus, Samsung, NXP, Micron, IBM, GlobalFoundries, UltraSoC, Siemens, among many others. One of the key markets for... » read more

The Week In Review: Manufacturing


Chipmakers Last year, Analog Devices Inc. (ADI) completed the acquisition of Linear Technology. Now, ADI plans to shut down one of Linear’s fabs as well as a test operation. “Analog Devices plans to close the smallest of its four wafer fabs, which was acquired as part of its March 2017 acquisition of Linear Technology and is located at Hillview Drive in Milpitas, California. This clo... » read more

The Week In Review: Design


Tools & IP Pro Design launched three new proFPGA Zynq UltraScale+ FPGA modules for SoC and IP prototyping. The modules combine FPGA logic with quad-core ARM Cortex-A53 and dual-core ARM Cortex-R5 processors and on-board interfaces. The modules offer a total of up to 5 extension sites with 531 standard I/Os and 16 multi-gigabit transceivers (MGTs). The board allows a maximum point-to-point ... » read more

The Week in Review: IoT


Finance Vectra raised $36 million in Series D funding led by Atlantic Bridge Capital. The Ireland Strategic Investment Fund and Nissho Electronics also participated in this funding round along with returning investors Khosla Ventures, Accel Partners, IA Ventures, AME Cloud Ventures, DAG Ventures, and Wipro Ventures, bringing Vectra’s total funding to date to $123 million. Vectra will use the... » read more

Who Will Regulate Technology?


Outside regulation and technological innovation don't mix well, particularly when it comes to modern electronics, but the potential for that kind of oversight is rising. In the past, most of the problems involving regulation stemmed from a lack of understanding about technology and science. This is hardly a new phenomenon. It literally dates back centuries. Galileo was forced to recant helio... » read more

A Reliability Baseline Is Essential For Today’s Complex IC Designs


Design rule checking (DRC) represents a common platform by which we can all compare relative rule complexity. The industry expectation is that all foundries will provide complete DRC and layout vs. schematic (LVS) rule decks at all process nodes for the successful tape-out of IC designs. However, not only are DRC operations growing significantly (Figure 1), but the scope of the rules needed to ... » read more

Regain Your Power With Machine Learning


It wasn’t too long ago that machine learning (ML) seemed like a fascinating research topic. However, in no time at all, it has made a swift transition from a world far-off to common presence in news, billboards, workplaces, and homes. The concept itself is not new but evidently what has caused it to take off is the rapid growth of data in many applications and more computational power. Closer... » read more

Functional Safety: A Way Of Life


Rejuvenated over the holidays and back in full swing. This might be TMI, but I have been doing some meditative yoga and I seemed to have finally discovered myself. Though I am partly kidding, it does bring us to theme for this blog. As we tackle a new year and all the challenges it brings, I have been engaged with mindfulness and meditative yoga, which looks at a holistic approach to bring t... » read more

How SoC Interconnect Enables Flexible Architecture For ADAS And Autonomous Car Designs


When the mobile phone era saw its fastest growth, the design teams that were the most innovative were able to introduce game-changing features before anyone else. Those companies also had the most configurable interconnect IP, allowing them to adapt to quickly changing market needs faster than their competition. Now, nearly a decade later, when autonomous driving is quickly moving into the m... » read more

Debugging Debug


There appears to be an unwritten law about the time spent in debug-it is a constant. It could be that all gains made by improvements in tools and methodologies are offset by increases in complexity, or that the debug process causes design teams to be more conservative. It could be that no matter how much time spent on debug, the only thing accomplished is to move bugs to places that are less... » read more

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