Beacons Beckon Ubiquity In IoT Era
By Prithi Ramakrishnan - 11 Jan, 2018 - Comments: 0

In the early 1900s, radio beacons were created with the aim of tracking ships and planes. Prior to this innovation, pilots and ships’ captains usually relied on celestial navigation, and anyone who wanted to know their location was in the dark. A century later, engineers took the concept and devised Bluetooth Low Energy-enabled beacons, a vast use never envisaged by their 20th cent... » read more

Circuit-Level Aging Simulations Predict The Long-Term Behavior Of ICs
By Fraunhofer IIS/EAS - 10 Jan, 2018 - Comments: 0

Reliability is a major criterion for integrated circuits (ICs) in safety critical applications, such as automotive, medical, or aviation electronics. A particular effect that contributes to wear-out is device (i.e. transistor) degradation. Its impact on the circuit behavior can be verified by circuit level aging simulations, which are offered by various EDA vendors. However, reasonable results ... » read more

The Implementation of Embedded PVT Monitoring Subsystems In Today’s Cutting Edge Technologies
By Moortec - 10 Jan, 2018 - Comments: 0

This new whitepaper from Moortec takes a comprehensive look at the Implementation of Embedded PVT Monitoring Subsystems in Today’s Cutting Edge Technologies and how this can benefit today’s advanced node semiconductor design engineers by improving the performance and reliability of SoC designs. With advances in CMOS technology, and the scaling of transistor channel lengths to nanometer (nm)... » read more

Performance Improvement By System Aware Substrate Noise Analysis For Mixed-signal IC
By Ansys - 10 Jan, 2018 - Comments: 0

The market wants mixed ICs that are smaller and cheaper, and even provide advanced features. To satisfy this contradiction, many mixed ICs makers are reducing their bill of materials (BOM) cost by decreasing the amount of materials in the package or on a board. But these cost-effective methods can cause significant performance degradation with intensified coupling effects due to substrate noise... » read more

Methodology For Analyzing And Quantifying Design Style Changes And Complexity Using Topological Patterns
By Cadence - 10 Jan, 2018 - Comments: 0

In order to maximize yield, IC design companies spend a lot of effort to analyze what types of design styles are needed and used in their layouts (standard cells, macros, routing layers, and so forth). This paper introduces a novel methodology for full chip high performance topological pattern analysis and the applications of this methodology towards analyzing design styles in order to quanti... » read more

Improving In-System Test With Tessent VersaPoint Test Point Technology
By Mentor, a Siemens Business - 10 Jan, 2018 - Comments: 0

This paper describes a new versatile test point technology called VersaPoint, which has been developed specifically to work with designs implementing mixed EDT/LBIST methodologies to reduce EDT pattern counts and improve Logic BIST (LBIST) test coverage. VersaPoint test points can reduce compressed pattern counts 2X to 4X beyond compression alone and improve LBIST test coverage beyond what is p... » read more

The Route To A Trillion Devices
By Arm - 10 Jan, 2018 - Comments: 0

Technology vendors like to talk about data being big, really big. Petabytes of storage; gigabits of bandwidth; megaflops of processing power. But data doesn’t have to be big to be valuable. One of the most successful financial trades of all time was premised on a piece of information that could have been represented by a single bit (1 or 0). On June 19 1815, the bond market in London wa... » read more

What Will 2018 Bring To The IoT?
By Jeff Dorsch - 10 Jan, 2018 - Comments: 1

The Internet of Things is widely expected to progress in 2018—especially the Industrial IoT—as industry standards get hashed out and more vendors take cybersecurity seriously. On the home front, many Americans are growing accustomed to artificial intelligence technology from their use of Amazon Echo, Apple HomeKit, and Google Home devices. They’re talking to their remote controls to ch... » read more

Blog Review: Jan. 10
By Jesse Allen - 10 Jan, 2018 - Comments: 0

Rambus' Aharon Etengoff explains the Meltdown and Spectre CPU vulnerabilities and why they could negatively affect the semiconductor industry for decades. Cadence's Paul McLellan has an explainer on Meltdown and how it's an unintended consequence of a processor behaving as intended. Mentor's Ruben Ghulghazaryan and Jeff Wilson investigate using machine learning to predict post-deposition ... » read more

Manufacturing Bits: Jan. 9
By Mark LaPedus - 09 Jan, 2018 - Comments: 0

Two-photon lithography Lawrence Livermore National Laboratory (LLNL) has extended the capabilities of a high-resolution 3D printing technique called two-photon lithography (TPL). TPL enables the development of 3D-printed objects. LLNL’s technology could enable 3D-printed embedded structures inside the body, such as stents, joint replacements or bone scaffolds. It could also one day be ... » read more

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