Symmetric Multiprocessing (SMP) RTOS On Xtensa Multicore


An increasing number of multi-threaded embedded applications want to leverage multicore designs. Symmetric Multiprocessing (SMP) RTOS provides automatic load balancing of multiple threads in a multicore environment. Also, numerous legacy multi-threaded embedded applications are deployed on a single-core RTOS that customers want to move to a multicore environment. For these reasons, application ... » read more

Beyond Simulation: Transforming Early IC Design With Insight Analyzer


Traditional verification methods are proving inadequate for addressing critical reliability challenges in today's increasingly complex integrated circuit (IC) designs. Modern IC design requires a proactive approach to verification that emphasizes early-stage analysis. The shift-left methodology enables earlier identification of potential design risks, addressing the complex challenges of IP blo... » read more

Building Vision-Enabled Devices To Capture The Emerging Wave In IoT


The evolution of vision (the eye) is considered one of the most significant events in the history of life on Earth. 540 million years ago, during the Cambrian period, there was a sudden burst of evolutionary activity that resulted in the appearance of a variety of new species. Many of these species were characterized by the development of an eye which allowed them to perceive and interact with ... » read more

What Exactly Is Multi-Physics?


Multi-physics is the new buzzword in semiconductor design and analysis, but the fuzziness of the term is a reflection of just how many new and existing problems need to be addressed simultaneously in the design flow with advanced nodes and packaging. This disaggregation of planar SoCs and the inclusion of more processing elements, memories, interconnects, and passives inside a package has cr... » read more

Uncore Frequency Scaling For Energy Optimization In Heterogeneous Systems (UIC, Argonne)


A new technical paper titled "Exploring Uncore Frequency Scaling for Heterogeneous Computing" was published by researchers at University of Illinois Chicago and Argonne National Laboratory. Abstract "High-performance computing (HPC) systems are essential for scientific discovery and engineering innovation. However, their growing power demands pose significant challenges, particularly as sys... » read more

Simulation Study Of Vertically Stacked 2D NSFETs


A new technical paper titled "Simulation of Vertically Stacked 2-D Nanosheet FETs" was published by researchers at Università di Pisa and TU Wien. Abstract "We present a simulation study of vertically stacked 2-D nanosheet field-effect transistors (NSFETs). The aim of this investigation is to assess the performance and potential of FinFET alternatives, i.e., gate-all-around (GAA) nanosheet... » read more

Rowhammer Mitigation With Adaptive Refresh Management Optimization (KAIST, Sk hynix)


A new technical paper titled "Securing DRAM at Scale: ARFM-Driven Row Hammer Defense with Unveiling the Threat of Short tRC Patterns" was published by researchers at KAIST and Sk hynix. Abstract (partial) "To address the issue of powerful row hammer (RH) attacks, our study involved an extensive analysis of the prevalent attack patterns in the field. We discovered a strong correlation betwee... » read more

High-Temperature Nonreciprocal Thermal Radiative Properties From Semiconductors (U. Houston, Caltech, UW-Madison)


A new technical paper titled "High-Temperature Strong Nonreciprocal Thermal Radiation from Semiconductors" was published by University of Houston, California Institute of Technology and University of Wisconsin-Madison. Abstract "Nonreciprocal thermal emitters that break the conventional Kirchhoff's law allow independent control of emissivity and absorptivity and promise exciting new funct... » read more

Maximizing Energy Efficiency in Subthreshold RISC-V Cores (NTNU)


A new technical paper titled "Optimizing Energy Efficiency in Subthreshold RISC-V Cores" was published by researchers at Norwegian University of Science and Technology (NTNU). Abstract "Our goal in this paper is to understand how to maximize energy efficiency when designing standard-ISA processor cores for subthreshold operation. We hence develop a custom subthreshold library and use it to ... » read more

The Impact of Generative AI on the Edge for the Semiconductor Industry


In the first of a three-part series, Expedera, in conjunction with the Global Semiconductor Alliance’s Emerging Technologies (EmTech) group, explores “The Impact of Generative AI on the Edge for the Semiconductor Industry”. In this white paper, the working group explores the evolution of Generative AI (GenAI), and how the rapidly evolving semiconductor industry can enable GenAI innovation... » read more

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