Chip Industry Week In Review
By The SE Staff - 13 Sep, 2024 - Comments: 0

Infineon rolled out the world's first 300mm gallium nitride (GaN) wafer, opening the door for high-volume manufacturing of GaN-based power semiconductors. A 300mm wafer contains 2.3 times as many chips per wafer as a 200mm wafer. Fig.1: Infineon's 300mm GaN wafer. Source: Infineon The Semiconductor Industry Association released its 2024 State of the U.S. Semiconductor Industry report th... » read more

Scalable Fabrication of Graphene FETs on Non-Planar Surfaces (Imperial College London)
By Technical Paper Link - 12 Sep, 2024 - Comments: 0

A new technical paper titled "Fabrication of graphene field effect transistors on complex non-planar surfaces" was published by researchers at Imperial College London. Abstract "Graphene field effect transistors (GFETs) are promising devices for biochemical sensing. Integrating GFETs onto complex non-planar surfaces could uncap their potential in emerging areas of wearable electronics, such... » read more

Elimination Of Functional False Path During RDC Analysis
By Farhad Ahmed - 12 Sep, 2024 - Comments: 0

Reset domain crossing (RDC) issues can occur in sequential designs when the reset of a source register differs from the reset of a destination register, even if the data path is in the same clock domain. This can lead to asynchronous crossing paths and metastability at the destination register. RDC analysis on RTL designs is done to find such metastability issues in a design, which may occur du... » read more

Simulation Replay Tackles Key Verification Challenges
By Robert Ruiz - 12 Sep, 2024 - Comments: 0

Simulation lies at the heart of both verification and pre-silicon validation for every semiconductor development project. Finding functional or power problems in the bringup lab is much too late, leading to very expensive chip turns. Thorough simulation before tapeout, coupled with comprehensive coverage metrics, is the only way to avoid surprises in silicon. However, the enormous size and comp... » read more

eFuses: Use Cases, Benefits, And Design In The System Context
By Jens Michael Warmuth - 12 Sep, 2024 - Comments: 0

In recent years, the automotive industry has been one of the drivers of innovation in the field of electrical and electronic system safety. This is primarily due to the rapid uptake and, in some cases, already mandatory use of advanced driver assistance systems (ADAS) as well as to the first steps toward (partially) autonomous vehicles. In conventional safety systems, the off state can be as... » read more

Can You Rely Upon Your NPU Vendor To Be Your Customers’ Data Science Team?
By Steve Roddy - 12 Sep, 2024 - Comments: 0

The biggest mistake a chip design team can make in evaluating AI acceleration options for a new SoC is to rely entirely upon spreadsheets of performance numbers from the NPU vendor without going through the exercise of porting one or more new machine learning networks themselves using the vendor toolsets. Why is this a huge red flag? Most NPU vendors tell prospective customers that (1) the v... » read more

HBM4 Feeds Generative AI’s Hunger For More Memory Bandwidth
By Nidish Kamath - 12 Sep, 2024 - Comments: 0

Generative AI (Gen AI), built on the exponential growth of Large Language Models (LLMs) and their kin, is one of today’s biggest drivers of computing technology. Leading-edge LLMs now exceed a trillion parameters and offer multimodal capabilities so they can take a broad range of inputs, whether they’re in the form of text, speech, images, video, code, and more, and generate an equally broa... » read more

Is PPA Relevant Today?
By Brian Bailey - 12 Sep, 2024 - Comments: 1

The optimization of power, performance, and area (PPA) has been at the core of chip design since the dawn of EDA, but these metrics are becoming less valuable without the context of how and where these chips will be used. Unlike in the past, however, that context now comes from factors outside of hardware development. And while PPA still serves as a useful proxy for many parts of the hardwar... » read more

DDR5 12.8Gbps MRDIMM IP: Powering The Future Of AI, HPC, And Data Centers
By Kos Gitchev - 12 Sep, 2024 - Comments: 0

The demand for higher-performance computing is greater than ever. Cutting-edge applications in artificial intelligence (AI), big data analytics, and databases require high-speed memory systems to handle the ever-increasing volumes and complexities of data. Advancements in cloud computing and machine virtualization are stretching the limits of current capabilities. AI applications hosted in the ... » read more

Higher Density, More Data Create New Bottlenecks In AI Chips
By Adam Kovac - 12 Sep, 2024 - Comments: 0

Data movement is becoming a bigger problem at advanced nodes and in advanced packaging due to denser circuitry, more physical effects that can affect the integrity of signals or the devices themselves, and a significant increase in data from AI and machine learning. Just shrinking features in a design is no longer sufficient, given the scaling mismatch between SRAM-based L1 cache and digital... » read more

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