Plasticine: A Reconfigurable Architecture For Parallel Patterns (Stanford)


Source: Stanford University Stanford University has been developing Plasticine, which allows parallel patterns to be reconfigured. "ABSTRACT Reconfigurable architectures have gained popularity in recent years as they allow the design of energy-efficient accelerators. Fine-grain fabrics (e.g. FPGAs) have traditionally suffered from performance and power inefficiencies due to bit-level ... » read more

More Knobs, Fewer Markers


The next big thing in chip design may be really big — the price tag. In the past, when things got smaller, so did the cost per transistor. Now they are getting more expensive to design and manufacture, and the cost per transistor is going up along with the number of transistors per area of die, and in many cases even the size of the die. That's not exactly a winning economic formula, which... » read more

Three Steps To Faster Low Power Coverage Using UPF 3.0 Information Models


Controlling power has its costs. The added power elements and their interactions make verification of low-power designs much more difficult and the engineer’s job overwhelmingly complex and tedious. Early versions of the Unified Power Format (UPF) provided some relief, but lacked provisions for a standardized methodology for low-power coverage. Ad hoc approaches are error prone and highly ... » read more

Dynamic CDC Jitter For Clock Domain Crossing (CDC) Signoff


By Himanshu Bhatt and Paras Mal Jain Detecting and debugging deep sequential CDC convergences using structural CDC verification is extremely difficult since doing a flat analysis on large designs has capacity related challenges, and even if verification tools can complete the analysis, it becomes a nightmare to debug the violations with complex sequential logic. Thus arises the need for dyna... » read more

Digital Twins In Automotive


The term “digital twin” refers to a new principle that is gaining importance in the development of complex hardware/software systems. In general, it refers to a virtual representation of the real system. This model serves to simulate the functional interactions of the parts, saving time and money by avoiding unnecessary redesign cycles and enabling considerably better optimization of the ov... » read more

Accelerating AI And ML Applications With PCIe 5


The rapid adoption of sophisticated artificial intelligence/machine learning (AI/ML) applications and the shift to cloud-based workloads has significantly increased network traffic in recent years. Historically, the intensive use of virtualization ensured that server compute capacity adequately met the need of heavy workloads. This was achieved by dividing or partitioning a single (physical) se... » read more

Using Digital Image Correlation To Determine BGA Warpage


Digital image correlation (DIC) is a non-contact, full-field displacement, optical measurement technique. It is often used in the following applications: Material characterization Coefficient of thermal expansion (CTE) Glass transition temperature Young’s modulus Poisson’s ratio Sample testing for fatigue and failure In situ monitoring of displacements and str... » read more

SAR ADCs For Machine-To-Machine Connections


In our previous blog about the importance of analog-to-digital converters (ADCs), we focused on the various architectures that are in common usage for the Industrial Internet of Things. In particular, we looked at which architecture was best for low-latency, low-power and high-precision applications, with each option having various advantages and disadvantages. When we looked at the applicati... » read more

Analog: Avoid Or Embrace?


We live in an analog world, but digital processing has proven quicker, cheaper and easier. Moving digital data around is only possible while the physics of wires can be safely abstracted away enough to provide reliable communications. As soon as a signal passes off-chip, the analog domain reasserts control for modern systems. Each of those transitions requires a data converter. The usage ... » read more

Brains And Computers At The VLSI Design Conference


One of the industry’s biggest events, the VLSI Design Conference, took place in Bangalore last week. This conference does a round-robin of cities, and this was the 10th time in its 33-year history that Bangalore was hosting it (the last time was in 2015). This year’s conference attracted over 1,800 technologist and leaders over five days – a huge turnout for this growing industry. Inci... » read more

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