category: Everything Low Power

category: IoT, Security & Automotive

Data Integrity For JEDEC DRAM Memories
By Shyam Sharma - 19 Jul, 2022 - Comments: 0

With the DRAM fabrication advancing from 1x to 1y to 1z and further to 1a, 1b, and 1c nodes along with the DRAM device speeds going up to 8533 for LPDDR5 and 8800 for DDR5, data integrity is becoming a really important issue that the OEMs and other users have to consider as part of the system that relies on the correctness of data being stored in the DRAMs for system to work as designed. I... » read more

Khronos: Open Standards Powering The Future Of Embedded Vision
By Paul McLellan - 09 Jun, 2022 - Comments: 0

At the recent Embedded Vision Summit, one of the presentations was by Neil Trevett of The Khronos Group. This is a standardization body and is a non-profit. He said that his day job is at Nvidia. It has been creating standards for 20 years with a focus on low-level hardware acceleration APIs for 3D graphics, parallel computation, augmented reality (AR), virtual reality (VR), and machine learnin... » read more

Open RAN Phase 2
By Paul McLellan - 12 May, 2022 - Comments: 0

I first wrote about Open RAN in my post Fourth 4G Network Goes Live in Japan. Open RAN is a program driven by a group of European operators to build specifications for common architecture instead of getting "locked into" the closed architectures sold by the big base-station vendors such as Nokia, Samsung, and Ericsson. It is analogous to what servers went through over the last few decades, m... » read more

The Era Of Fluid Simulations In Hollywood
By Veena Parthan - 14 Apr, 2022 - Comments: 0

With the magnificent real images of water pouring from the sky and the after-fire fumes from a car, there is no escaping from the laws of physics in movies either! Fluid simulation in the '50s and '60s was modeled mathematically before the computer graphics industry made its appearance. In the early ’90s, computer graphics (CG) in movies such as Waterworld and Titanic were restricted to wi... » read more

Constraints On The Electricity Grid
By Paul McLellan - 10 Mar, 2022 - Comments: 3

I recently wrote about Moss Landing, the biggest grid battery storage operation in the world. I discovered from talking to a friend recently that most people have no idea what constraints the electricity grid operates under. I think most politicians are the same, and they assume that if we build enough windmills and solar panels then we can live in some sort of eco-nirvana. But that's not goin... » read more

CES 2022: In Person But Not Many People
By Paul McLellan - 13 Jan, 2022 - Comments: 0

CES was and is officially hybrid, with some events on-site in Las Vegas and some online. But many of the large exhibitors pulled out of attending in person (including Cadence, although we might be a big exhibitor at DAC but at CES we are tiny). A lot of the press seems to have stayed away in-person too. To be honest, a lot of the press has been gradually staying away for years since so much is ... » read more

Moving From AMBA ACE to CHI For Coherency
By Min Lei - 09 Dec, 2021 - Comments: 1

Introduced back in 2011, ACE (AXI Coherency Extensions) grew from the existing AXI protocol to satisfy the cache coherency maintenance demands of SoCs with multi core processors and shared caches in smart phones, mobile computers, and servers. It added new channels for cache communication, extra signals to allow new transaction for coherency support, and five state model for caches. AXI + A... » read more

New Glasses Target Aspects Of AR & VR
By Paul McLellan - 11 Nov, 2021 - Comments: 0

Despite all the recent noise about the Metaverse (and Facebook changing its company name to Meta), I remain convinced that augmented reality (AR) is going to be more important than virtual reality (VR), at least in the medium term. For one thing, virtual reality headsets are large and expensive, at least today. I'm also not convinced that we all want to live in a virtual world like that...but I... » read more

Multi-DRAM Memory Subsystems In SoCs
By Shyam Sharma - 14 Oct, 2021 - Comments: 0

Even with DRAM capacity going up with each generation of DRAM, the demand for memory densities by a variety of applications is growing at an even faster rate. To support these high memory densities and bus width requirements (that are typically more than what a single DRAM can support), almost all the new generation of memory subsystems and SoCs have multiple DRAM dies combined to effectively c... » read more

The Next Generation Of General-Purpose Compute At Hot Chips
By Paul McLellan - 09 Sep, 2021 - Comments: 0

At the recent HOT CHIPS, the first day opened with the chips that you first think of when you hear the word processor. These are the next generation of chips from the likes of Intel, AMD, and IBM. There were lots of other chips too, such as Arm's Neoverse N2, and NVIDIA's new data-processing unit (DPU), or AMD's next-generation graphics architecture. But for this post, anyway, I'm going to focu... » read more

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