Verification Of Multi-Cycle Paths And False Paths


All chip designers know that they must take special care to avoid metastability problems when they have multiple, asynchronous clock domains. In contrast, a design in which all clocks are synchronous may appear simple. Logic synthesis ensures that the shortest paths between registers don’t have races and that the longest paths fit within the target cycle time. However, single-clock design is ... » read more

Electric Vehicle Development From System To Software


There is perhaps no higher profile electronic product category today than electric vehicles (EVs). Aggressive startups pioneered the market, but many major automobile manufacturers are now participating as well. Rising fuel costs, improved battery technology and increased environmental sensitivity have all helped to drive public enthusiasm for EVs. In response, developers are driving continuous... » read more

EDA Forms The Basis For Designing Secure Systems


By Adam Cron and Brandon Wang As Internet of Things (IoT) devices rapidly increase in popularity and deployment, security risks are arising at all levels. It could be at the usability level such as social engineering, pretexting, phishing; at the primitive level such as cryptanalysis; at the software level such as client-side scripting, code injection; and now even at the hardware level. Dur... » read more

The Fast, ‘Attractive’ Path From Great PPA To The Best PPA For High-Performance Arm Cores


By Mark Richards and Neel Desai When you want to create a website for your new side-hustle, or maybe for your local soccer team, it's rare that you would order a book on cascading-style sheets, break out the HTML editor and start from a blank sheet of “paper.” You'd do the smart thing and use a website builder, link it to some content management tool (this would get you to 90% of a usabl... » read more

The Seven Steps Of Formal Signoff


“Signoff” may be the most exciting—and frightening—word in semiconductor development. After many months, or even years of team effort, committing a design to silicon fabrication is indeed an exciting and rewarding event. But, there’s often significant anxiety involved as well – if any missed issues result in having to “turn” the chip, the increased costs and time-to-market delay... » read more

Analog Design Needs To Change


It’s an exciting time to be involved in analog design! Innovation in analog design methodology has been flourishing with the introduction of new tools and improved methodologies. And this innovation is badly needed; analog design is getting tougher. Design schedules remain tight, and the technical challenges analog designers face continue to grow – especially when moving to advanced node te... » read more

Physical Verification For Photonics Integrated Circuits


Silicon photonics is a promising solution for the explosive growth of data volume and network traffic in computing and communications. Silicon photonics integrates photonics applications on a silicon wafer, utilizing mainstream Si-based technology. Photonics integrated circuits (PIC) offer several advantages over traditional integrated circuits: faster data transfer speeds, lower power consumpt... » read more

Simulation: Go Parallel Or Go Home


Although complemented by other valuable technologies, functional simulation remains at the heart of semiconductor verification. Every chip project still develops a testbench, usually compliant with the Universal Verification Methodology (UVM), and a large test suite. Constrained-random stimulus generation has largely replaced hand-crafted tests, but at the expense of much more simulation time. ... » read more

New Parasitic Extraction Requirements In Custom Design For The Next Wave Of SoCs


Fast growing markets like 5G, biotechnology, AI, and automotive are driving the new wave in semiconductor design and the need for highly integrated system on chip (SoCs). Power management, sensors, RF and precision analog functionality are all integrated on the same substrate which poses new challenges for custom design tools. Specifically, there are new challenges for parasitic extraction that... » read more

AI Chips Driving Need For New Test Implementation Methodologies


Artificial intelligence has never been more in the news than it is today.  From picking stock market investments to autonomous driving, we have heard about what AI can do when it works and what happens when it goes awry. The consequences are huge if AI doesn’t work which puts a lot of pressure on hardware engineers to ensure that their chips can be extensively tested for proper and safe func... » read more

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