EMEA Investments Driving Technology Specialization

By Liz Allan - 04 Nov, 2024 - Comments: 0

Government programs across Europe and the UK are seeing a surge of investments in leading edge technology, materials, and packaging. Industry and academia are coalescing around specialty areas, drawing on established relationships to foster innovation and fill gaps in regional supply chains while also maintaining international bonds. Government initiatives also are picking up in Israel, Saudi A... » read more

2D Semiconductors Make Progress, But So Does Silicon

By Katherine Derbyshire - 30 Oct, 2024 - Comments: 1

Semiconductor industry researchers have been anticipating the need for better transistor channel materials to replace silicon for a long time, but silicon devices have continued to improve enough to postpone that change. Silicon continues to provide an unmatched combination of device performance, manufacturability, and cost effectiveness. In recent years, though, the “end of silicon” cha... » read more

Hybrid Bonding Makes Strides Toward Manufacturability

By Laura Peters - 28 Oct, 2024 - Comments: 0

Hybrid bonding is gaining traction in advanced packaging because it offers the shortest vertical connection between dies of similar or different functionalities, as well as better thermal, electrical and reliability results. Advantages include interconnect scaling to submicron pitches, high bandwidth, enhanced power efficiency, and better scaling relative to solder ball connections. But whil... » read more

Tuning Design And Process For High-NA EUV Stitching

By Kevin Lucas - 24 Oct, 2024 - Comments: 0

By Kevin Lucas and James Ban Upcoming 14A and 10A process nodes will use high-NA EUV anamorphic scanners, which will require two stitched half-fields to achieve the equivalent wafer exposure area of previous-generation scanners, see figure 1. The lithography patterning at a stitching boundary between two mask exposures will be affected by additional process variation than are encountered in ... » read more

Metal-Oxide-Metal Capacitor Simulation And Modeling By Virtual Fabrication

By Qingpeng Wang - 24 Oct, 2024 - Comments: 0

Metal-Oxide-Metal (MOM) capacitors are passive radio frequency (RF) capacitive devices that are a common component in semiconductor logic chips [1]. A SPICE model of a MOM capacitor is typically used by designers during the design and performance evaluation of logic chip RF circuitry. Traditionally, it may take at least 3 months from the completion of the design layout, wafer fabrication, final... » read more

Advanced Packaging Driving New Collaboration Across Supply Chain

By Gregory Haley - 24 Oct, 2024 - Comments: 0

The semiconductor industry is undergoing a profound shift in packaging technologies to ones that rely on close collaboration among multiple stakeholders to solve intricate, multi-faceted, and extraordinarily complex problems. At the heart of this change is the convergence of heterogeneous integration, chiplets, and 3D stacking. Heterogeneous approaches allow companies to combine different te... » read more

Luminary Panel Sees Multi-Beam Mask Writers And Curvilinear Masks Key To 193i And EUV

By Jan Willis - 24 Oct, 2024 - Comments: 0

Attendance was up and the mood was optimistic at this year’s SPIE Photomask and EUV conference held September 29 through October 3, 2024. The optimism was apparent as well for multi-beam mask writers and curvilinear masks during the eBeam Initiative’s 15th annual reception and meeting held on October 1. In the eBeam Initiative’s annual Luminaries survey, 93% of those surveyed said that pu... » read more

Unveiling the Stability of Proper Polyethyleneimine-Functionalized Carbon Nanotube Composites-Derived Chemiresistive CO2 Sensors

By Brewer Science - 24 Oct, 2024 - Comments: 0

A technical paper titled "Unveiling the Stability of Proper Polyethyleneimine-Functionalized Carbon Nanotube Composites-Derived Chemiresistive CO2 Sensors" was published by researchers at Brewer Science. Abstract "Branched polyethyleneimine (PEI), consisting of numerous imine groups, is employed for CO2 gas detection, attributed to the interaction between imine groups and CO2. Incorporatin... » read more

Revolutionizing IC Packaging With High-Density RDL Technology

By Curtis Zwenger - 24 Oct, 2024 - Comments: 0

The demand for high-performance devices, particularly in AI, HPC, and data centers, has surged dramatically in the ever-evolving landscape of integrated circuit technology. This demand has been further accelerated by the COVID-19 pandemic, pushing the boundaries of silicon technology to its limits. Enter Amkor’s S-SWIFT, a packaging solution designed to address these challenges and revolution... » read more

Multi-Tier Die Stacking Enables Efficient Manufacturing

By Jessica Albright - 24 Oct, 2024 - Comments: 0

Advanced packaging is currently facing a critical challenge to increase manufacturing efficiency without sacrificing device performance. Vertical integration techniques, such as multi-tier die stacking and hybrid bonding, enable increased integration density, therefore improving yield of high-quality devices. However, these highly precise processes require significant attention to defectivity... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

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