Manufacturing Bits: Feb. 1

By Mark LaPedus - 01 Feb, 2022 - Comments: 0

Fab equipment cybersecurity In a major step to help provide security in the semiconductor manufacturing supply chain, SEMI has published the first cybersecurity specifications and standards for fab equipment. For some time, the semiconductor industry has been developing new cybersecurity standards for fab equipment in an effort to protect systems from potential cyberattacks, viruses, and IP... » read more

Next-Gen 3D Chip/Packaging Race Begins

By Mark LaPedus - 31 Jan, 2022 - Comments: 5

The first wave of chips is hitting the market using a technology called hybrid bonding, setting the stage for a new and competitive era of 3D-based chip products and advanced packages. AMD is the first vendor to unveil chips using copper hybrid bonding, an advanced die-stacking technology that enables next-generation 3D-like devices and packages. Hybrid bonding stacks and connects chips usin... » read more

Week In Review: Manufacturing, Test

By Mark LaPedus - 28 Jan, 2022 - Comments: 0

Government policy As reported, the United States is in dire need of more fab capacity as well as packaging plants. The U.S. took a big step in an effort to solve the problem. The U.S. House of Representatives this week introduced the America Competes Act of 2022. The bill includes funding for the Creating Helpful Incentives to Produce Semiconductors for America (CHIPS) Act, which is earmarked... » read more

Manufacturing Bits: Jan. 25

By Mark LaPedus - 25 Jan, 2022 - Comments: 0

Stretchable thermometers The Harvard John A. Paulson School of Engineering and Applied Sciences (SEAS) has developed a stretchable and self-powered thermometer that can be integrated into various systems, such as stretchable electronics and soft robots. Depending on the materials used, the stretchable thermometer can measure temperatures of more than 200 degrees Celsius to -100 degrees Cel... » read more

Photomask Challenges At 3nm And Beyond

By Mark LaPedus - 25 Jan, 2022 - Comments: 1

Experts at the Table: Semiconductor Engineering sat down to discuss optical and EUV photomasks issues, as well as the challenges facing the mask business, with Naoya Hayashi, research fellow at DNP; Peter Buck, director of MPC & mask defect management at Siemens Digital Industries Software; Bryan Kasprowicz, senior director of technical strategy at Hoya; and Aki Fujimura, CEO of D2S. What f... » read more

Week In Review: Manufacturing, Test

By Mark LaPedus - 21 Jan, 2022 - Comments: 0

Fabs Intel has announced plans for an initial investment of more than $20 billion in the construction of two new leading-edge fabs in Ohio. Planning for the first two factories will start immediately, with construction expected to begin late in 2022. Production is expected to come online in 2025. As part of the announcement, Air Products, Applied Materials, Lam Research and Ultra Clean Technol... » read more

Mixed Outlook For Silicon Wafers

By Mark LaPedus - 20 Jan, 2022 - Comments: 0

Silicon wafers are a fundamental part of the semiconductor business. Every chipmaker needs to buy them in one size or another, such as 200mm, 300mm and others. Silicon wafer vendors produce and sell bare or raw silicon wafers to chipmakers, who in turn process them into chips. So what’s in store for the silicon wafer market? Sungho Yoon, senior research manager at SEMI, sat down with Se... » read more

Thin Quad Die Package (QDP) Development

By Shaun Bowers - 20 Jan, 2022 - Comments: 0

In the world of solid-state memory fabs, bits per mm2 rule. In the memory packaging market, mm2 of silicon per a given package thickness is the defining feature. Both the memory architecture of the wafer and the package technology take advantage of 3D structures to achieve best in class bit density. In the case of the wafer fab, 3D NAND and other technologies are pushing the envelope to meet ev... » read more

200mm Shortages May Persist For Years

By Mark LaPedus - 20 Jan, 2022 - Comments: 2

A surge in demand for chips at more mature process nodes is causing shortages for both 200mm foundry capacity and 200mm equipment, and it shows no signs of letting up. In fact, even with new capacity coming on line this year, shortages are likely to persist for years, driving up prices and forcing significant changes across the semiconductor supply chain. Shortages for both 200mm foundry cap... » read more

The Effect Of Pattern Loading On BEOL Yield And Reliability During Chemical Mechanical Planarization

By Taeyon (TY) Oh - 20 Jan, 2022 - Comments: 0

Chemical mechanical planarization (CMP) is required during semiconductor processing of many memory and logic devices. CMP is used to create planar surfaces and achieve uniform layer thickness during semiconductor manufacturing, and to optimize the device topology prior to the next processing step. Unfortunately, the surface of a semiconductor device is not uniform after CMP, due to different re... » read more

← Older posts Newer posts →

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

New AI Processors Architectures Balance Speed With Efficiency

Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.

by Ed Sperling

category: Manufacturing, Packaging and Materials

category: IoT, Security & Automotive

Manufacturing Bits: Feb. 1

Next-Gen 3D Chip/Packaging Race Begins

Week In Review: Manufacturing, Test

Manufacturing Bits: Jan. 25

Photomask Challenges At 3nm And Beyond

Week In Review: Manufacturing, Test

Mixed Outlook For Silicon Wafers

Thin Quad Die Package (QDP) Development

200mm Shortages May Persist For Years

The Effect Of Pattern Loading On BEOL Yield And Reliability During Chemical Mechanical Planarization