Week In Review: Manufacturing, Test


Chipmakers and OEMs A severe winter storm has hit many parts of the United States, including Texas. In Austin, utility providers are prioritizing service to residential areas. As a result, electricity and natural gas providers have temporarily suspended service to Austin’s semiconductor manufacturers, including Samsung and NXP. "Due to the recent blackouts in Texas, Samsung Austin Semicon... » read more

More Silicon Wafer Consolidation


The silicon wafer business typically flies under the radar, but it’s a fundamental part of the semiconductor business. Every chipmaker needs to buy silicon wafers in one size or another. In the supply chain, silicon wafer vendors produce and sell bare or raw silicon wafers to chipmakers, who in turn process them into chips. So it’s important to keep an eye on the market. Today, the s... » read more

Shortages, Challenges Engulf Packaging Supply Chain


A surge in demand for chips is impacting the IC packaging supply chain, causing shortages of select manufacturing capacity, various package types, key components, and equipment. Spot shortages in packaging surfaced in late 2020 and have since spread to other sectors. There are now a variety of choke points in the supply chain. Wirebond and flip-chip capacity will remain tight throughout 2021... » read more

Increasing The Conductive Density Of Packaging


Wide bandgap (WBG) semiconductor technologies have created new challenges and opportunities for power packages. Developments such as silicon carbide (SiC) and gallium nitride (GaN), have a higher figure of merit (FOM) compared to silicon MOSFETs and have extended the efficiency, output power and/or switching frequency range and operating temperature range for power electronics. With lower lo... » read more

Packaging Demands For RF And Microwave Devices


RF and microwave integrated circuits (ICs), monolithic microwave ICs (MMICs) and systems in package (SiPs) are vital for a wide range of applications. These include mobile phones, wireless local-area networks (WLANs), ultra-wideband (UWB), internet-of-things (IoT), GPS and Bluetooth devices. Moreover, RF-optimized packaging products and processes are essential to enabling the 5G ramp-up. RFI... » read more

China Passes Americas And Japan In IC Capacity


Back in 2012, China ranked fifth among seven regions worldwide in IC wafer capacity but surged past the Americas and Japan in 2018 and 2019 to claim the number three position (figure 1). That’s a big deal given that ICs account for the largest share of wafer capacity excluding discrete, opto, MEMS and sensors. China’s IC wafer capacity growth accelerated to tune of 14% in 2019 and 21% in... » read more

Power Converter Chip Research Booms


Power electronics are booming, fueled by demand ranging from induction chargers for wearable and portable electronics, to charging stations for electric vehicles. An estimated 80% of all U.S. electricity will pass through some form of power converter by 2030, said Yogesh Ramadass, director of power management at Texas Instruments' Kilby Labs. Transportation applications, in particular, deman... » read more

Breaking The 2nm Barrier


Chipmakers continue to make advancements with transistor technologies at the latest process nodes, but the interconnects within these structures are struggling to keep pace. The chip industry is working on several technologies to solve the interconnect bottleneck, but many of those solutions are still in R&D and may not appear for some time — possibly not until 2nm, which is expected t... » read more

WLFO For High-Performance Low-Cost Packaging Of RFMEMS-CMOS


Navigating the trade-offs between performance, size, cost and reliability can be a challenge when considering integrated circuit (IC) packaging and the end-application. The integration of micro-electromechanical systems (MEMS), either monolithic or heterogeneous, introduces yet another level of complexity that has only recently been a major focus of multi-device packaging. Wafer-level fanout (W... » read more

Marangoni Effect-Based Under-Layer For A Dual Damascene Via-First Approach


One of the main challenges of a Dual Damascene (DD) via-first process is the control of the Critical Dimensions (CDs) in the lithography of the trenches. The PhotoResist (PhR) thickness presents variations from the via arrays to the open areas, which cause the variation of CDs: the swing effect. The planarization of a DD via-first process is reported. A dual-layer solution is used to demonstrat... » read more

← Older posts Newer posts →