Week In Review: Manufacturing, Test


Fab tools PDF Solutions has entered into a definitive agreement to acquire Cimetrix. Under the terms, PDF will pay a cash amount of $35.0 million, net of cash on Cimetrix’s balance sheet as of closing, and subject to other closing adjustments. With the move, PDF will expand into new markets. Cimetrix is a provider of equipment connectivity products for smart manufacturing and Industry 4.0... » read more

Upturn Seen For Silicon Wafer Market


After a downturn in 2019, the silicon wafer market is expected to rebound in 2020. 2021 looks even better for silicon wafers. Silicon wafers are a fundamental part of the semiconductor business. Every chipmaker needs to buy them in one size or another. Silicon wafer vendors produce and sell bare or raw silicon wafers to chipmakers, who in turn process them into chips. The silicon wafer ma... » read more

The Ten Commandments Of Packaging


Semiconductor packaging continues to evolve as chipmakers find new ways to fit more functionality into smaller spaces. Whereas the package once served primarily as a means of attaching a chip to a circuit board and protecting it from damage due to heat, moisture, etc., packaging today plays an important role in adding value to the device, boosting customization while helping to reduce costs. ... » read more

EUV Challenges And Unknowns At 3nm and Below


The chip industry is preparing for the next phase of extreme ultraviolet (EUV) lithography at 3nm and beyond, but the challenges and unknowns continue to pile up. In R&D, vendors are working on an assortment of new EUV technologies, such as scanners, resists, and masks. These will be necessary to reach future process nodes, but they are more complex and expensive than the current EUV pro... » read more

Taking Advantage Of Outsourced Test Services


The business model in today’s competitive world of commerce has shifted over recent years to “services.” Companies like Microsoft, Amazon and Google are prime success stories that have advanced the industry with business-enabling services. These economic productivity improvement services allow their customers to focus on product architecture, design and quick time to market. The service p... » read more

Bonding Issues For Multi-Chip Packages


The rising cost and complexity of developing chips at the most advanced nodes is forcing many chipmakers to begin breaking up that chip into multiple parts, not all of which require leading edge nodes. The challenge is how to put those disaggregated pieces back together. When a complex system is integrated monolithically — on a single piece of silicon — the final product is a compromise ... » read more

From FinFETs To Gate-All-Around


When they were first commercialized at the 22 nm node, finFETs represented a revolutionary change to the way we build transistors, the tiny switches in the “brains” of a chip. As compared to prior planar transistors, the fin, contacted on three sides by the gate, provides much better control of the channel formed within the fin. But, finFETs are already reaching the end of their utility as... » read more

Smart Manufacturing In Fabs


Not long after STMicroelectronics opened its first semiconductor plant in Singapore more than 50 years ago, a facility chiefly focused on chip assembly and packaging, the company realized that it had constructed the site in an area with a blossoming chip ecosystem with a bright future. Before long, the company became the first to start a wafer fab facility in the so-called Little Red Dot. To... » read more

What’s Next In AI, Chips And Masks


Aki Fujimura, chief executive of D2S, sat down with Semiconductor Engineering to talk about AI and Moore’s Law, lithography, and photomask technologies. What follows are excerpts of that conversation. SE: In the eBeam Initiative’s recent Luminary Survey, the participants had some interesting observations about the outlook for the photomask market. What were those observations? Fujimur... » read more

A Study Of Wiggling AA Modeling And Its Impact On Device Performance In Advanced DRAM


In this paper, a wiggling active area (fin) in an advanced 1x DRAM process was analyzed and modeled using the pattern-dependent etch simulation capabilities of the SEMulator3D semiconductor modeling software. Nonuniformity in sidewall passivation caused by hard mask pattern density loading was identified as the root cause of the wiggling profile. The calibrated model mimicked these phenomena, g... » read more

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