Blog Review: Feb. 15


Siemens EDA's Harry Foster examines the relationship between verification maturity and non-trivial bug escapes into production, as well as whether safety critical development processes yield higher quality in terms of preventing bugs and achieving silicon success. Synopsys' Shankar Krishnamoorthy finds that the rapid progress of machine learning models is driving demand for more domain-speci... » read more

Week In Review: Semiconductor Manufacturing, Test


Chips for consumer devices are down, but the overall chip industry is actively preparing for the next phase of growth. Worldwide silicon wafer shipments, which are an aggregate view of all the various semiconductor segments, hit an all-time high in 2022, increasing 4% to 14,713 million square inches (MSI). Wafer revenue, meanwhile, rose 9.5% to $13.8 billion over the same period, SEMI reported ... » read more

Week In Review: Design, Low Power


Arm is heading for an IPO this year, with plans "fairly well developed and underway now," CEO Rene Haas told Reuters. Arm reported fiscal Q3 revenue of $746 million, up 28% compared with the same period in 2021, setting the stage for a public offering. The company noted it had double- or triple-revenue increases in automotive, consumer, infrastructure, and IoT. The Si2 Compact Model Coalit... » read more

Week In Review: Auto, Security, Pervasive Computing


General Motors (GM) made a deal with GlobalFoundries (GF) to have chips made at the U.S.-based foundry in upstate New York for GM’s key suppliers. GF will expand its production capabilities exclusively for GM’s supply chain, while GM promises to bring economies of scale through its strategy to reduce the unique types of chips needed in products. J.D. Power released its 2023 U.S. Vehicle ... » read more

Blog Review: Feb. 8


Cadence's Sanjeet Kumar points to key changes and optimizations that are done for USB3 Gen T compared to USB3 Gen X tunneling in order to minimize tunnel overhead and maximize USB3 throughput. Siemens EDA's Harry Foster considers the effectiveness of IC and ASIC verification by looking at schedule overruns, number of required spins, and classification of functional bugs. Synopsys' Chris C... » read more

Week In Review: Semiconductor Manufacturing, Test


Imec released its semiconductor roadmap, which calls for doubling compute power every six months to handle the data explosion and new data-intensive problems. Imec named five walls (scaling, memory, power, sustainability, cost) that need to be dismantled. The roadmap (below) stretches from 7nm to 0.2nm (2 angstroms) by 2036, and includes four generations of gate-all-around FETs followed by thre... » read more

Week In Review: Auto, Security, Pervasive Computing


The United States Justice of Department asked Tesla for documents relating to its Autopilot driver assistance system and its Full Self-Driving (FSD). Among other tech company woes, some of which are leading to layoffs, Apple sales dropped 5% year over year and it missed its earnings target this quarter. The U.S. state of Kansas will commit $304M to Kansas-based OSAT Integra Technologies t... » read more

Week in Review: Design, Low Power


Intel discontinued its Pathfinder for RISC-V program, according to numerous reports. The program provided a pre-silicon development environment to support IP selection and early-stage software development using Intel FPGA and simulator platforms. "Since Intel will not be providing any additional releases or bug fixes, we encourage you to promptly transition to third-party RISC-V software tools ... » read more

Blog Review: Feb. 1


Siemens EDA's Harry Foster explores trends in low power design techniques for ICs and ASICs, with 72% of design projects reported actively managing power. Synopsys' Charlie Matar, Rita Horner, and Pawini Mahajan look at the concept of reliability, availability, and serviceability (RAS) in the context of high-performance computing SoC designs and how it can be supported with silicon lifecycle... » read more

Week In Review: Semiconductor Manufacturing, Test


Starting in 2025, SEMICON West will move to Phoenix for a five-year annual rotation. And in 2024, it will shift dates from July to October. This year’s conference will still take place July 11 to 13 at the Moscone Center. Phoenix will first host SEMICON West on October 7-9, 2025. Thereafter, it will be held at the Moscone Center in San Francisco on the alternating years and over the long term... » read more

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