Blog Review: Nov. 20


Arm's Ben Fletcher points to research into a new low-cost alternative to through-silicon vias in 3D stacked ICs, particularly cost-sensitive IoT designs, where communication between silicon layers is completely wireless. Cadence's Paul McLellan checks in on the progress of DARPA's OpenROAD project to build a no-human-in-the-loop open source EDA flow for leading-edge nodes. Mentor's Colin ... » read more

RISC-V Markets, Security And Growth Prospects


Semiconductor Engineering sat down to discuss open instruction set hardware with Ben Levine, senior director of product management in Rambus' Security Division; Jerry Ardizzone, vice president of worldwide sales at Codasip; Megan Wachs, vice president of engineering at SiFive; and Rishiyur Nikhil, CTO of Bluespec. What follows are excerpts of that conversation.  Part one of this discussion is ... » read more

Week In Review: Design, Low Power


M&A eSilicon will be acquired by Inphi Corporation and Synopsys. Inphi is acquiring the majority of the company, including the ASIC business and 56/112G SerDes design and related IP, for $216 million in both cash and the assumption of debt. Inphi expects to combine its DSP, TiA, Driver and SiPho products with eSilicon’s 2.5D packaging and custom silicon design capabilities for electro-optics... » read more

Blog Review: Nov. 13


Applied Materials' Buvna Ayyagari-Sangamalli argues that the siloed structure that produced the computing eras of the past will not be sufficient to fuel the AI era and that a new codesign approach to everything from architecture to materials is needed. Arm's Wendy Elsasser examines emerging non-volatile memories and how they have triggered innovation for new memory protocols and optimized s... » read more

Week In Review: Design, Low Power


Cadence unveiled a static timing/signal integrity analysis and power integrity analysis tool, Tempus Power Integrity Solution, that integrates the Tempus Timing Signoff and Voltus IC Power Integrity signoff engines. Early use cases demonstrated it correctly identified IR drop errors, avoiding silicon failure prior to tapeout and improving the maximum frequency in silicon by up to 10%. Arasan... » read more

Blog Review: Nov. 6


Cadence's Paul McLellan considers why high-performance compute, high-performance networks, and security will all be vital to the next wave of devices and the importance of optimization. Synopsys' Taylor Armerding points to some best practices for assessing your supply chain to find the weak links that could lead to a security breach, from why to make it a priority to what to ask software ven... » read more

Service Revenue Growing With Chip Complexity


Rising complexity, new markets, and a shortage of in-house expertise are beginning to rekindle demand for services for the first time in nearly a decade. The semiconductor industry has been racing to design chips for a variety of new and existing applications, but they are facing challenges on a number of fronts: Leading-edge chips require new architectures due to a sharp reduction in s... » read more

Week In Review: Design, Low Power


Micron acquired FWDNXT, an AI software and hardware startup. Founded in 2017 and based in Lafayette, Indiana, FWDNXT, specializes in building machine learning deep neural network inference accelerators scalable from edge devices to server-class performance as Xilinx FPGAs, SoCs, or SDK. The company's engine already powers Micron's Deep Learning Accelerator (DLA) technology. “FWDNXT is an a... » read more

Which Verification Engine When


Frank Schirrmeister, group director for product marketing at Cadence, talks about which tools get used throughout the design flow, from architecture to simulation, formal verification, emulation, prototyping all the way to production, how the cloud has impacted the direction of the flow, and how machine learning will impact verification. » read more

Migrating 3D Into The Mainstream


Semiconductor Engineering sat down to discuss changes required throughout the ecosystem to support three-dimensional (3D) chip design with Norman Chang, chief technologist for ANSYS' Semiconductor Business Unit; John Park, product management director for IC packaging and cross-platform solutions at Cadence; John Ferguson, director of marketing for DRC applications at Mentor, a Siemens Business;... » read more

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