Service Revenue Growing With Chip Complexity

Demand for outside expertise grows with new markets and architectures.


Rising complexity, new markets, and a shortage of in-house expertise are beginning to rekindle demand for services for the first time in nearly a decade.

The semiconductor industry has been racing to design chips for a variety of new and existing applications, but they are facing challenges on a number of fronts:

  • Leading-edge chips require new architectures due to a sharp reduction in scaling benefits, sometimes requiring navigating through a variety of advanced packaging and power management schemes with which chipmakers have little experience.
  • Many of these designs are targeted at markets that are still in flux, such as AI and automotive, making it far more difficult to optimize them for power, performance and area, as well as changes in algorithms and industry standards, without the necessary domain expertise.
  • Time-to-market demands require more effective use of multiple tools to deal with multi-physics and changes in the design flow, as well as complex third-party IP that needs to be fully qualified and integrated into designs. Many companies do not have this kind of expertise in-house, or the budgets to compete against large system houses to hire experts across a variety of disciplines.

“The SoC design environment is getting very complex,” said Farzad Zarrinfar, managing director, IP division at Mentor, a Siemens Business. “People are creating SoC designs, they put a software layer on top of that, they must create an early prototype, then verify before they go to high volume. All of that integration and complexity needs to be verified at the chip level and the system level.”

Mentor is hardly alone. The whole EDA/IP industry is seeing increased demand for expert services. “With the rapid growth of SoC designs these days, the need for an easy-to-setup hardware-software verification platform is in high demand, said Farhad Fallah, application engineer at Aldec. “That can expedite the SoC design and development process exponentially.”

For its part, Mentor offers a simulation environment that includes static and dynamic approaches, along with early prototyping hardware, and an emulation environment, so you can accelerate the verification, Zarrinfar pointed out. “These are very sophisticated systems, and who knows the system better than we that developed it? It makes a lot of sense to cooperate with customers, and help them to benefit from these systems to get to market faster, and save money. For example, yield enhancement is a fantastic way of saving money and ramping faster.”

Mentor is just one of many companies expanding activities in the area of consulting services.

“A good example of this is in the area of functional safety,” said Raik Brinkmann, CEO of OneSpin Solutions. “People have been developing chips, but they have no idea of what functional safety means for a chip and how to establish that. That’s where a lot of services and education are necessary to move them along, even though in the past they were very successful at developing chips. In addition, there are new companies moving into the hardware space that need to educate themselves about verification in the first place, and formal is one of the solutions they need.”

Until recently, some of these services were given away for free, but increasingly EDA companies see this as a new revenue stream, and a potentially lucrative one.

“We have a model for it, and some companies are starting to work on this with us on this,” Brinkmann said. “There are companies with a different business model than they used to have.”

One of the drivers is that not every chipmaker has expertise in every area, particularly when it comes to complex designs or those aimed at safety-critical markets such as automotive, industrial and medical.

“It depends on the type of team the customer has,” says Maximilian Odendahl, CEO of Silexica. “Right now if they have a large team and they’re developing an FPGA, they’re probably using high-level synthesis as a hardware productivity tool. But what HLS originally was meant for was to enable the software guys. We’re not there yet. You still need hardware guys to do integration at the system level for things like throughput, and if a software team wants to use high-level synthesis today, I don’t think they can be 100% successful by themselves. You always need an integration team where you have people who are hardware-savvy and integration-savvy, and if you don’t have that it’s a perfect place for enabling services.”

It’s also a way of bridging the expertise gap due to a shortage of available talent in the market. So even though big systems companies have the budgets to hire experts in a variety of areas, those experts aren’t always available.

“It’s really a resource constraint,” said Odendahl. “While these companies may offer great benefits, there just aren’t enough people. This is why there is so much interest in HLS. If you can enable the software guys through tools and training and services, and hand off to the hardware guys later in the design cycle, then you can finish a design faster.”

Services also can provide a different perspective on the design process. “It makes a lot of sense because every customer in IP needs some level of differentiation in their design—just that little bit extra,” said Mentor’s Zarrinfar. “That could be test chip development in combination with IP, they could want to put their IP in a configuration that has not been done before, or they need lots of PVT corners for a special application.”

Shifting left
All of these aspects fit into the “shift left” approach of addressing issues earlier in the design process, so as to better define projects and create virtual platforms, among other things.

“Especially when it comes to early modeling to enable software development, there are a couple of reasons why this is happening,” said Frank Schirrmeister, senior group director for product management and marketing at Cadence. “Just looking at the modeling expertise needed for something like transaction-level models, it’s a bit of an art form similar to analog design. It’s not that you can’t learn modeling. There are certainly classes and so forth, and you can learn the basics about abstraction. But transaction-level modeling to me always feels like something you need to have a knack for to be really good at it. So having those people in place who can do the modeling to enable shift left is very important.”

Schirrmeister pointed to companies like Vayavya Labs, Circuit Sutra and a number of others offering virtual platform services to meet the need for additional expertise. “This helps certainly in the context of emulation hybrids, and virtual platforms. We typically are asked if we have people who can help users get set up, and get their design up and running as a virtual platform, which they then connect to the emulator.”

Why is this all happening? Schirrmeister believes there are a couple of reasons. “There are more and more people doing their own chip designs, so they need early models for performance analysis, and they need early models for software development. Sometimes it’s a mix of both. Having the ability to deliver something like that to your customer is very important. It enables Shift Left. And then, because there are more and more people who are doing these models or are doing chips in companies where traditionally they haven’t been doing chips — such as this whole vertical integration bit — there are companies you traditionally wouldn’t expect are doing chip design now. It’s a fascinating, fast-changing world. All those system houses that traditionally would buy their chips from somebody are designing chips themselves.”

For example, this would include companies like a Bosch in the automotive space or an Ericsson in communications.

“They want to go into this business and for the initial design, they work with teams like our services teams to build that chip, and then over time they learn and they apply knowledge,” he observed. “This type of engagement often includes both the implementation and the virtual prototyping, and to me, you Shift Left the most when you go virtual. You do this with virtual prototyping, then the bigger portion of the chip comes in, especially when you deal with system companies in all domains, which haven’t done chips themselves before. That changes the industry dynamic to really recognize that software teams need to be enabled early on, for the whole system. And design is driving those changes, then services teams or [third party companies] do services in the system modeling domain along with the foundries.”

The main drivers are about enabling software, and going into domains not in previously, Schirrmeister said. “And then sometimes when it comes to the modeling aspect, it’s actually not your core competence, so the core competence for a developer of a certain system, like, for example, Ericsson that is using our virtual prototypes. For them, building all these models is actually not something which they want to waste their time on; they want their product to be kick ass and differentiated, so the more things you can offload, the more you can focus on differentiation, and Shift Left, by being able to stay focused on the system integration aspects, on the software aspects and the pieces are unique to them.”

Another aspect to this is examining how chip design could be easier, he suggested. “You would just have a ‘Lego’-based system and it all would work right, but I think we’re not there yet.”

Moving in this direction is Arm’s DesignStart program, which both Cadence and Mentor participate in, to provide simplified and expedited access to chip development tooling and a free evaluation. Engineers can go into a cloud-based environment to create designs on the lower end of the complexity spectrum, such as IoT edge node devices, without having to have a CAD group in house.

“In the more complicated spaces is where you really want to be careful, because at 7 and 5nm all the physics go berserk so as far as all of the implementation aspects,” Schirrmeister said. “If I’m a CEO of a startup, I wouldn’t dare do a design without getting the right experts. Hiring them is expensive, so partnering is one of the choices with a services provider. It’s the same with modeling. You want to make sure that you model the right things, that you enable your software teams to shift left the most, and for that you want to have the right expertise in house if you do it very often. But if it’s a limited number of projects, then services are the right way to go.”

The burgeoning automotive application space is replete with newcomers and new opportunities. Here, especially, additional assistance is a growing need.

“Functional safety is very new,” said Jamil Mazzawi, CEO of Optima. “I feel for the poor chip engineers. They started doing chips, and then they have to do a design for verification, then design for testing, and design for scan. They have to do many things, and now they have to also do design for functional safety. Some companies have a long tradition of doing functional safety and they have expertise in this such as NXP or Renesas or ST. Many other customers that are new to this have their first requirement to do automotive chips, and it’s the first time they are doing it. They need a lot of guidance.”

Optima provides some assistance here through its Functional Safety Alliance program, through which the company works with multiple experts in the field to help customers and also provide some of the expertise, Mazzawi said.

Whether it is to get an edge on the competition, quickly create a virtual platform when the engineering team hasn’t done it before, or enter a new application area, the need for consulting, design services, or methodology advice is on the rise.

What’s different is that in the past, third-party services frequently were an alternative to hiring full-time experts. With new markets opening up and rising complexity, specific types of expertise are in short supply, and companies have quickly recognized that expertise has real value in today’s market.

—Ed Sperling contributed to this report.

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