How complexity and more data are affecting the design flow.
Frank Schirrmeister, group director for product marketing at Cadence, talks about which tools get used throughout the design flow, from architecture to simulation, formal verification, emulation, prototyping all the way to production, how the cloud has impacted the direction of the flow, and how machine learning will impact verification.
Steps are being taken to minimize problems, but they will take years to implement.
AMD CTO Mark Papermaster talks about why heterogeneous architectures will be needed to achieve improvements in PPA.
Companies are speeding ahead to identify the most production-worthy processes for 3D chip stacking.
New capacity planned for 2024, but production will depend on equipment availability.
Number of options is growing, but so is the list of tradeoffs.
Increased transistor density and utilization are creating memory performance issues.
Suppliers are investing new 300mm capacity, but it’s probably not enough. And despite burgeoning 200mm demand, only Okmetic and new players in China are adding capacity.
The industry reached an inflection point where analog is getting a fresh look, but digital will not cede ground readily.
100% inspection, more data, and traceability will reduce assembly defects plaguing automotive customer returns.
Engineers are finding ways to effectively thermally dissipate heat from complex modules.
Different interconnect standards and packaging options being readied for mass chiplet adoption.
Disaggregation and the wind-down of Moore’s Law have changed everything.
Steps are being taken to minimize problems, but they will take years to implement.
Leave a Reply