Overcoming Regression Debug Challenges With Machine Learning


Development of a modern semiconductor requires running many electronic design automation (EDA) tools many times over the course of the project. Every stage, from architectural exploration and design to final implementation and manufacturing preparation, has multiple methodology loops that must be repeated again and again. Even in such a complex development flow, functional simulation stands ... » read more

Better Choreography Required For Complex Chips


The rapidly growing number of features and options in chip design are forcing engineering teams to ratchet up their planning around who does what, when it gets done, and how various components will interact. In effect, more elements in the design flow need to be choreographed much more precisely. Some steps have to shift further left, while others need to be considered earlier in the plannin... » read more

Revolutionizing Product Development And User Experience: The Transformative Power Of Generative AI


Generative AI has become a prominent and versatile solution across various domains, including chip and system development. Its progress and impact have outpaced many other technological advancements, significantly benefiting numerous areas. In the semiconductor industry, EDA tools with generative AI have already established their position by offering unparalleled optimization capabilities. Thes... » read more

Developing A Customized RISC-V Core For MEMS Sensors


We recently described how Codasip Labs is working with the NimbleAI project to push the boundaries of neuromorphic vision. Let’s talk about another cool project. This project is focused on another sense, hearing. We will use our unique Codasip Studio design toolset to develop a customized RISC-V core for MEMS (micro-electro-mechanical system) sensors. Again, technology is inspired by bio... » read more

What’s The Buzz At The Battery Show?


Hwee Yng Yeo catches up with Christian Loew, Keysight’s solution manager for battery pack and module test, to find out what was abuzz on the floor of The Battery Show in Stuttgart recently. Hwee Yng: Christian, could you tell us what was the main buzz at The Battery Show this year? Christian: There were two topics topping the buzz list at the show – on the R&D side, new sodium i... » read more

Shift Left With Calibre To Optimize IC Design Flow Productivity, Design Quality, And Time To Market


Every IC designer strives to create a “clean,” or error-free, cell, block, chiplet, SoC, or 3DIC assembly before passing their work downstream for full sign-off verification. However, waiting until sign-off verification to find out how well you did is probably the least efficient approach to achieving production-ready layouts, impacting engineer productivity, project schedules, and hardware... » read more

Edge Computing: Four Smart Strategies For Safeguarding Security And User Experience


It is a brave new world for enterprise networks. Smart devices are getting smarter, and edge computing is emerging as a viable way to reduce latency and improve performance. But as network architectures grow increasingly amorphous, what kind of impact will this have on security and performance? Download this white paper to discover how you can boost security, ensure quality of service, and futu... » read more

Blog Review: June 21


Synopsys' Vikram Bhatia identifies four trends driving the migration of EDA tools and chip design workloads to the cloud, from ever-increasing compute and time-to-market demands to advanced cybersecurity features. Cadence's Veena Parthan checks out how computational fluid dynamics and finite element analysis can help improve aquaculture with sustainable fish cage nets that minimize stagnatio... » read more

Heterogeneous Integration — Chiplets


Chiplets are a hot topic in the semiconductor industry, and to many, represent a paradigm change for chip designers and chip consumers alike. While heterogenous chiplets seem to have multiple advantages over traditional monolithic silicon and even homogenous chiplets, they still have not been mass-market deployed. This white paper, published in cooperation with the Global Semiconductor Alliance... » read more

An Automated Method For Adding Resiliency To Mission-Critical SoC Designs


Adding safety measures to system-on-chip (SoC) designs in the form of radiation-hardened elements or redundancy is essential in making mission-critical applications in the Aerospace and Defense (A&D), cloud, automotive, robotics, medical, and Internet-of-Things (IoT) industries more resilient against random hardware failures that occur. Designing for reliable and resilient functionality doe... » read more

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