category: Packaging

category: IoT, Security & Automotive

Impact of Clustering Methods On Partitioning Decisions For 3DICs (imec, Université libre de Bruxelles)
By Technical Paper Link - 28 Jul, 2023 - Comments: 0

A technical paper titled “Impact of gate-level clustering on automated system partitioning of 3D-ICs” was published by researchers at Université libre de Bruxelles and imec. Abstract: "When partitioning gate-level netlists using graphs, it is beneficial to cluster gates to reduce the order of the graph and preserve some characteristics of the circuit that the partitioning might degrade. ... » read more

A Flip-Chip, Co-Packaged With Photodiode, High-speed TIA in 16nm FinFET CMOS
By Technical Paper Link - 20 Jul, 2023 - Comments: 0

A technical paper titled "A 112-Gb/s —8.2-dBm Sensitivity 4-PAM Linear TIA in 16-nm CMOS With Co-Packaged Photodiodes" was published by researchers at University of Toronto, Alphawave IP, and Huawei Technologies Canada. Abstract: "A flip-chip co-packaged linear transimpedance amplifier (TIA) in 16-nm fin field effect transistor (FinFET) CMOS demonstrating 112-Gb/s four-level pulse-amplitude... » read more

A Chiplet-Based Supercomputer For Generative LLMs That Optimizes Total Cost of Ownership
By Technical Paper Link - 20 Jul, 2023 - Comments: 0

A technical paper titled "Chiplet Cloud: Building AI Supercomputers for Serving Large Generative Language Models" was published by researchers at University of Washington and University of Sydney. Abstract: "Large language models (LLMs) such as ChatGPT have demonstrated unprecedented capabilities in multiple AI tasks. However, hardware inefficiencies have become a significant factor limiting ... » read more

A 3D MEMS Coaxial Socket Overcomes Challenges In Semiconductor Package Chip Testing
By Technical Paper Link - 20 Jul, 2023 - Comments: 0

A technical paper titled "Fabrication and Characterization of Three-Dimensional Microelectromechanical System Coaxial Socket Device for Semiconductor Package Testing" was published by researchers at Yonsei University and Protec MEMS Technology. Abstract: "With the continuous reduction in size and increase in density of semiconductor devices, there is a growing demand for contact solutions tha... » read more

Heterogeneous Integration As A Path Towards Sustainable Computing, Using Chiplets
By Technical Paper Link - 06 Jul, 2023 - Comments: 0

A technical paper titled "Towards Sustainable Computing: Assessing the Carbon Footprint of Heterogeneous Systems" was published by researchers at Arizona State University and University of Minnesota. Abstract: "Decades of progress in energy-efficient and low-power design have successfully reduced the operational carbon footprint in the semiconductor industry. However, this has led to an incre... » read more

Impact of CMOS Image Sensors Fabrication Processes On The Quality Of Smartphone Pictures
By Technical Paper Link - 06 Jul, 2023 - Comments: 0

A technical paper titled “A Review of the Recent Developments in the Fabrication Processes of CMOS Image Sensors for Smartphones” was published by researchers at Texas A&M University. Abstract: "CMOS Image Sensors are experiencing significant growth due to their capabilities to be integrated in smartphones with refined image quality. One of the major contributions to the growth of ima... » read more

Chiplets: Bridging The Gap Between The System Requirements And Design Aggregation, Planning, And Optimization
By Technical Paper Link - 14 Jun, 2023 - Comments: 0

A technical paper titled “System and Design Technology Co-optimization of Chiplet-based AI Accelerator with Machine Learning” was published by researchers at Auburn University. Abstract: "With the availability of advanced packaging technology and its attractive features, the chiplet-based architecture has gained traction among chip designers. The large design space and the lack of sys... » read more

Framework To Compile Quantum Programs Onto Chiplets (UCSB, Cisco)
By Technical Paper Link - 03 Jun, 2023 - Comments: 0

A technical paper titled "Compilation for Quantum Computing on Chiplets" was published by researchers at UC Santa Barbara and Cisco Quantum Lab. Abstract: "Chiplet architecture is an emerging architecture for quantum computing that could significantly increase qubit resources with its great scalability and modularity. However, as the computing scale increases, communication between qubits w... » read more

NIST Releases “Vision And Strategy for the National Semiconductor Technology Center”
By Technical Paper Link - 05 May, 2023 - Comments: 0

A paper titled "A Vision and Strategy for the National Semiconductor Technology Center" was published by the U.S. Department of Commerce’s National Institute of Standards and Technology (NIST). The paper describes how the NSTC (National Semiconductor Technology Center) will develop and safeguard chips and technologies of the future. “The NSTC will be an ambitious public-private consortiu... » read more

Data-Centric Reconfigurable Array Chiplets (Princeton)
By Technical Paper Link - 21 Apr, 2023 - Comments: 0

A technical paper titled "Massive Data-Centric Parallelism in the Chiplet Era" was published by researchers at Princeton University. Abstract: "Traditionally, massively parallel applications are executed on distributed systems, where computing nodes are distant enough that the parallelization schemes must minimize communication and synchronization to achieve scalability. Mapping communica... » read more

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