category: Whitepapers

category: IoT, Security & Automotive

High-Performance Analog And RF Circuit Simulation Using The Analog FastSPICE Platform At Columbia University
By Mentor, a Siemens Business - 22 Apr, 2015 - Comments: 0

The research group led by Professor Peter Kinget at the Columbia University Integrated Systems Laboratory (CISL) focuses on cutting edge analog and RF circuit design using digital nanoscale CMOS processes. Areas of research include design techniques for circuits operating below 1 V, digitally calibrated RF front ends for superior linearity performance, LO synthesizers for wireless applications,... » read more

Meeting Functional Safety Requirements Efficiently Via Electronic Design Tools And Techniques
By Cadence - 22 Apr, 2015 - Comments: 0

In an intelligent electronic system, unexpected errors can lead to unplanned, unexpected behavior. This can be a potentially dangerous proposition for, say, an automotive manufacturer, as well as a costly occurrence for consumer product developers. Compliance to the latest safety standards can be a laborious, time-consuming process. Fortunately, there are now technologies available that can aut... » read more

Layering Protocol Verification
By Synopsys - 22 Apr, 2015 - Comments: 0

Layering protocols are modeled using layering structures that mirror the protocol layers. There are significant challenges in modelling verification components for layering protocols such as (1) reuse, (2) scalability, (3) controllability, and (4)observability. Furthermore, there may be requirements for complex test scenarios where a great deal of interaction is required between test sequence e... » read more

Faster Time To Root Cause With Diagnosis-Driven Yield Analysis
By Mentor, a Siemens Business - 16 Apr, 2015 - Comments: 0

ICs developed at advanced technology nodes of 65 nm and below exhibit an increased sensitivity to small manufacturing variations. New design-specific and feature-sensitive failure mechanisms are on the rise. Complex variability issues that involve interactions between process and layout features can mask systematic yield issues. Without improved yield analysis methods, time-to-volume is delayed... » read more

High-Performance Analog And RF Circuit Simulation Using The Analog FastSPICE Platform At Columbia University
By Mentor, a Siemens Business - 08 Apr, 2015 - Comments: 0

The research group led by Professor Peter Kinget at the Columbia University Integrated Systems Laboratory (CISL) focuses on cutting edge analog and RF circuit design using digital nanoscale CMOS processes. Areas of research include design techniques for circuits operating below 1 V, digitally calibrated RF front ends for superior linearity performance, LO synthesizers for wireless applications,... » read more

Ethernet In The Connected World
By Synopsys - 08 Apr, 2015 - Comments: 0

This white paper outlines the latest networking trends across some of the key market sectors including automotive, the connected home and data centers, and explains how Ethernet is relevant to each. It also explains how Synopsys responds to its customers’ needs to develop and offer configurable semiconductor IP that enables system-on-chip (SoC) design teams to quickly and reliably implement E... » read more

The Electrifying Side Of AUTOSAR
By Mentor, a Siemens Business - 02 Apr, 2015 - Comments: 0

This paper describes a meta-model that covers specific portions of software-oriented AUTOSAR development methodology using the ECU Resource Template. Prior to actual software development, the standardized and open AUTOSAR meta-model can be used to develop an architecture. The ECU Resource Template is particularly well suited for such tasks, because it opens up the actual software-oriented AU... » read more

DDR4 Board Design And Signal Integrity Verification Challenges
By Mentor, a Siemens Business - 25 Mar, 2015 - Comments: 0

This paper, originally presented at DesignCon and nominated for a best paper award, includes an investigation of DDR4's Pseudo Open Drain driver and what its use means for power consumption and Vref levels for the receivers. This paper also examines a DDR4 system design example and the need for simulating with IBIS power aware models versus transistor level models for Simultaneous Switching ... » read more

From Medical And Wearables To Big Data
By eSilicon - 25 Mar, 2015 - Comments: 0

Whether it’s a tiny always-on medical device or a secure cloud network processing Big Data, the Internet of Things is bringing new challenges to IC design. This white paper provides techniques and IP examples for managing IoT’s power and bandwidth demands. To read more, click here. » read more

Busting The 3 Big Common Myths About Physical Prototyping
By Synopsys - 25 Mar, 2015 - Comments: 0

FPGA-based prototyping is so popular because it provides an economical way to functionally validate an ASIC design by creating a prototype that runs “at speed”, includes real world I/O, and enables early software development. Experienced prototypers are familiar with its benefits but there are still designers opposed to physical prototyping because they believe that it does not scale to sup... » read more

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