Chip Industry Technical Paper Roundup: June 24

Wafer-scale AI accelerators vs. single chip GPUs; machine intelligence on wireless edge networks; topological flat-band-driven metallic thermoelectricity; all-in-one analog AI HW; centralized HPC platforms in SDVs; image classification of defects in IC manufacturing; reaction mechanisms in a chemically amplified EUV photoresist; statistics of EUV exposed nanopatterns.

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New technical papers recently added to Semiconductor Engineering’s library:

Name of Paper Research Organization
Performance, efficiency, and cost analysis of wafer-scale AI accelerators vs. single-chip GPUs UC Riverside
Machine Intelligence on Wireless Edge Networks MIT and Duke University
Topological Flat-Band-Driven Metallic Thermoelectricity TU Wien, Los Alamos National Lab, Flatiron Institute et al
All-in-One Analog AI Hardware: On-Chip Training and Inference with Conductive-Metal-Oxide/HfOx ReRAM Devices IBM Research-Europe
Towards Mixed-Criticality Software Architectures for Centralized HPC Platforms in Software-Defined Vehicles: A Systematic Literature Review Daimler Truck AG and Technical University of Munich
Domain Adaptation for Image Classification of Defects in Semiconductor Manufacturing Infineon Technologies, University of Padova and University of Bologna
Unraveling the Reaction Mechanisms in a Chemically Amplified EUV Photoresist from a Combined Theoretical and Experimental Approach imec and KU Leuven
Statistics of EUV exposed nanopatterns: Photons to molecular dissolutions Hitachi High-Tech Corporation

Find more semiconductor research papers here.



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