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Chip Sandwich: Electronics Chip & Photonics Chip Co-Optimized To Work Together (CalTech/Univ. of Southampton)

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A technical paper titled “A 100-Gb/s PAM4 Optical Transmitter in a 3-D-Integrated SiPh-CMOS Platform Using Segmented MOSCAP Modulators” was published by researchers at CalTech and University of Southampton.

“The resulting optimized interface between the two chips allows them to transmit 100 gigabits of data per second while producing just 2.4 pico-Joules per transmitted bit. This improves the electro-optical power efficiency of the transmission by a factor of 3.6 compared to the current state-of-the-art. A picojoule is one-trillionth of a Joule, which is defined as the energy released in one second by a current of 1 ampere through a resistance of 1 ohm—or about 0.24 calories,” according to this CalTech news article.

Find the technical paper here. Published November 2022.

A. H. Talkhooncheh et al., “A 100-Gb/s PAM4 Optical Transmitter in a 3-D-Integrated SiPh-CMOS Platform Using Segmented MOSCAP Modulators,” in IEEE Journal of Solid-State Circuits, 2022, doi: 10.1109/JSSC.2022.3210906.



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