Connect To Any Chip With Programmable GPIO

Using embedded FPGA to support the dozens of variations and kinds of GPIO interface protocols.


Your MCU/SoC today may have several options for GPIO connections: UART, SPI, I2C. But there are dozens of variations and kinds of GPIO interface protocols: you don’t have enough pins to provide all of them as hardwired options.

As a result, a significant number of your customers either can’t use your chip because they need to connect to another with a GPIO interface you don’t support, or they have to spend $/board space/power to have an FPGA translate between the incompatible interfaces.

You can increase your TAM (total available market) and increase your value proposition (benefit to your customer) by enabling your chip to connect to any GPIO interface by using embedded FPGA as shown below.

All you need is a single EFLX 4K LUT eFPGA tile (or 1 or 2 EFLX 1K LUT eFPGA tiles in 40ULP).

We support 4/5/6/7/12/16/28/40nm nodes for TSMC and 12/22 for GF. In 16nm an EFLX 4K LUT tile is 1.0 mm2. See product briefs for all of our eFPGA at:

Let’s look at two example UARTs to see how you can connect them to your processor bus (APB or AXI – we provide wrappers for both) and to the GPIO, and what the performance is in several nodes.

Contrast this with a more advanced UART, the 16550:

You can program any kind of GPIO interface with eFPGA and run at high speeds. Below are the LUT counts and speeds for the two UARTs and a couple other examples. We can help you with any kind of GPIO interface. The speeds shown below are for typical conditions because different customers have different operating ranges. We have timing corners for SS/TT/FF and from -40C to +125C Tj supported in our EFLX eFPGA compiler which is available at no cost for evaluation.

You can contact us at [email protected] to set up an overview of eFPGA hardware and software and to start an evaluation. See our website for an app note on making your MCU/SoC more powerful and flexible, including some example RTL.

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