Just one idea about how DVCon could be improved and the impact it could have on the EDA industry.
DVCon is undoubtedly the best conference in the industry if your interest is functional verification. In the past, it has also had a slant toward design. The focus is quite simply based on the standards activity going on within Accellera, the EDA industry’s body that turns problems into solution in a short space of time. As those standards mature, they are handed over to the IEEE for more refinement and industry consensus.
DVCon this year will be held Feb. 27 through March 2 at the Doubletree Hotel in San Jose, Calif. The show is packed with tutorials, papers, a small exhibition area and many talks over lunch, drinks or snacks. The full schedule is available here.
The focus has become verification because that has been the toughest nut to crack in recent years, and it looks as if that trend will continue. Verification is moving up in abstraction, and that has been the impetus for the work on , a subject that will probably be a dominant topic at this year’s event. The plan is to have a first version of the standard ready for DAC this year. Verification of power intent and implementation has also been a hot topic with the development of the Unified Power Format (UPF).
What can we expect of the future? Two areas that are seeing increasing interest are safety and security, and we are relying on verification to help in both areas. Safety concerns have created a resurgence in fault simulation, a technology that was big in the ’80s, but faded when scan test and ATPG took on the heavy lifting. But the industry now needs fault models for transient faults and possibly other fault types. Without these it is not possible to provide quantifiable numbers for the ability of a design to detect and handle failure.
But what has this got to do with DVCon? DVCon is set up as an industry conference and that means that the papers and presentations are focused towards what “is” rather than what “could be”. It is information that is immediately usable by the engineers that attend the conference and, most of the time, displays the work and achievement of the Accellera standards body. There is nothing to complain about there.
However, the industry is moving faster than it ever has in the past, and it is no longer about standardizing what has already been well tried and tested in the field. Standards such as UPF were created almost overnight based on a few early interactions with customers. The emerging Portable Stimulus work is primarily based on the learnings of two startups (Breker and Lighthouse Design, which was acquired by Mentor Graphics) that have worked in this space.
But had those startups attempted to submit papers to DVCon before Portable Stimulus efforts were well underway, they most likely would have been rejected. This may have delayed the start of this work because if users had been able to see the potential of this work earlier, they may have been more likely to encourage its development, which they are most certainly doing today. The same may be true of things such as new fault models.
While it is probably not a good idea for DVCon to become a research conference like DAC, it should open up to a lot more ideas for future paths that the standards organization may take. Many new ideas come from the engineers themselves who are solving problems in the best ways they can without any form of automation, or automation they have to provide themselves. This middle ground between research and completed work may help the industry navigate some of the paths into the future and make the user community—the designers and verification engineers—become a more integral part of the solution. This does not have to be in the form of papers, but maybe more open discussion groups where users can raise concerns and problems they are facing and would like to find help with.
Today, those users probably do share some of this information with their preferred EDA vendors, but if DVCon could provide a more open forum for users to talk about the problems, frustrations and areas in which they would like to find solutions, this may encourage more startups in the industry. That would lead to cheaper and faster solutions, and even speed up the standards process.
Startups are to the EDA industry what Accellera is to the IEEE. It is a symbiotic relationship, and DVCon is well positioned to enable this feedback loop within the industry.
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