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Deep Reinforcement Learning to Dynamically Configure NoC Resources

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New research paper titled “Deep Reinforcement Learning Enabled Self-Configurable Networks-on-Chip for High-Performance and Energy-Efficient Computing Systems” from Md Farhadur Reza at Eastern Illinois University.

Find the open access technical paper here. Published June 2022.

M. F. Reza, “Deep Reinforcement Learning Enabled Self-Configurable Networks-on-Chip for High-Performance and Energy-Efficient Computing Systems,” in EEE Access, 2022, doi: 10.1109/ACCESS.2022.3182500.

Visit Semiconductor Engineering’s Technical Paper library here and discover many more chip industry academic papers.

Further Reading:
Optimizing NoC-Based Designs
Further optimization of RTL repartitioning with switching from crossbar interconnects to NoCs.
How To Optimize A Processor
There are at least three architectural layers to processor design, each of which plays a significant role.
AI-Based Method To Prune The Design Space Of Heterogeneous NoCs
Researchers propose “an approach based on generative AI to help pruning complex design spaces for heterogeneous NoCs, according to configurable performance objectives.”



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