Embedded World 2018: Security, Safety, And Digital Twins

This year’s embedded world in Nuremberg was again very well attended despite a cold wave in Europe. The key trends I had expected to see were safety and security, and the exhibits did not disappoint. One additional key theme that stood out to me was that of “digital twinning.” And, of course, the battle of processor ecosystems does continue. RISC-V has joined the games and feels a bit like a gold rush—so far, the guys making jeans and shovels seem to be happy adopters.

The bitter cold did not hold attendance back—embedded world was bustling as ever. It always surprises me that a show for embedded systems can attract that much attention. The US counterparts do not even come close. To be fair, some of the hall was dedicated to very specific sub-segments, like single board computers or housing for electronic components, but still, embedded world’s size is impressive.

For EDA, the area of embedded systems is an important adjacency. The Cadence booth was located directly next to important tools, that emulation and prototyping connect to: not only software debuggers (Lauterbach’s Trace 32, ARM’s DS-5), but also to test equipment like Keysight’s Ixia’s network testing, Rohde & Schwartz’s 5G testing, Teledyne LeCroy’s PCI testing, and National Instrument’s LabView lab testing equipment. Users “just plug them as is into” emulation and prototyping as physical connections to drive real-world traffic, and virtual connections are emerging as well.

Safety was a huge topic and there were lots of software-related safety tools to be seen on the floor as well. With automotive being a key application domain – we showed a related automotive pedestrian recognition demo on Protium S1 – safety was everywhere, both from a hardware perspective with fault injection techniques, as well as from a software perspective, with analysis and safety recovery once a fault occurs. It’s crucial in transportation-related application domains for chips and software get back to a safe state in case of a fault. Cars, planes or trains just shutting down while at high speed or in the air would be a nightmare scenario.

Security was another key theme. With everything being connected somehow, the industry needs to make sure that we protect users from the bad guys; I was happy to see the ARM platform security architecture (PSA) make progress and find more adoption. Hardware security was a key topic as well—Cadence verification plays in this domain, both with key partners like Tortuga Logic (I contributed to a whitepaper here) as well as with our formal apps for security.

To me, the most exciting trend was that of “digital twins,” especially in the industrial internet of things (IIoT). The coolest demo of a digital twin that I saw was an industrial fill-level control system application that included sensors and actuators at the AVNET Silica booth (see figure 1). When viewed with a Microsoft HoloLens, a virtualized, digital model was shown in which the user could see real-time measurements, and even operate valves and switches with hand gestures. All the sensor data was transmitted into the digital twin and the actual floor did not need to be touched, actuator data was transmitted back from the digital twin to the actual control system. For all intents and purposes, it could have been in another country, or in the lab as figure 1 shows. Lots of future applications come to mind, such as adding virtual components to the industry floor and testing it out before building it.

Figure 1: An example of digital twinning

The demo has been developed by Prof. Hübner’s team at the Ruhr Universität Bochum – we at Cadence are a long term partner of his in the verification space and I am looking forward to what his team will show at the upcoming CDNLive EMEA.

“Digital twinning” seems to mean slightly different things in different application domains. For instance, I have seen it being mentioned in full system simulation for planes and cars. It runs the real sensor data in a virtual model for analytics and to train machine learning applications. Or it can be used to apply a dataset to the digital twin that would endanger the driver in a car. Other areas of digital twins I heard about are in medical applications. In this scenario, the collection of all the medical data about a human being becomes the digital twin—a thought that takes some getting used to, for me.

Bottom line though, digital twins are a key extension for EDA applications. For instance, in the system simulation model of an airplane, an emulation or prototyping model can be inserted to create an execution model with variable fidelity, leaving a new chip or sub-system in emulation at a higher level of accuracy than its system environment. This takes what we call “hybrid execution” in the EDA world to new levels, as I had described a while back in “Emulating Systems Of Systems.”

Finally, embedded world showed another example of how processor architectures define ecosystems, as I have outlined in previous blogs like “The Importance of Ecosystems in the Internet of Things Era, ” “Picking The Right Processor” and “Game Of Eco Systems.” Arm and Intel X86 are very present in many designs, but the power architecture cannot be ruled out, and of course, new entrants, such as RISC-V, change the dynamic as well. RISC-V, which was very visible in the academic conference program, had a partner booth at which companies that inhabit the boundary between EDA and embedded systems (like Imperas and UltraSoC) were exhibiting. It’s a gold rush, and jeans and shovels and—ahem—development tools are in high demand that support more than one processor architecture.

This year’s embedded world was once again proof how electronics change our day to day life—from medical through communication to transportation—mostly for the better. Cadence, especially with its design and verification offerings adjacent to the embedded world, is a key part of it! Fun times.