A technical paper titled “Selecting Alternative Metals for Advanced Interconnects” was published by researchers at imec and KU Leuven.
Abstract
“Today, interconnect resistance and reliability are key limiters for the performance of advanced CMOS circuits. As transistor scaling is slowing, interconnect scaling has become the main driver for circuit miniaturization, and interconnect limitations are expected to become even more stringent in future CMOS technology nodes. Current Cu dual-damascene metallization is also becoming increasingly challenging as critical interconnect dimensions approach 10 nm, alternative metallization schemes are researched with increasing intensity for about a decade. The selection of alternative metals is a highly multifaceted task and includes many criteria, covering the resistivity at reduced dimension, reliability and thermal aspects, as well as a sustainability perspective. In this tutorial, we introduce the basic criteria for alternative metal benchmarking and selection, and discuss the current state of the art of the field. The tutorial covers materials close to manufacturing introduction, materials under actual research, as well as future directions for fundamental research. While first alternatives to Cu metallization in commercial CMOS devices have become a reality recently, research for the ultimate interconnect metal is ongoing.”
Find the technical paper here. Published June 2024.
Soulié, Jean-Philippe, Kiroubanand Sankaran, Benoit Van Troeye, Alicja Leśniewska, Olalla Varela Pedreira, Herman Oprins, Gilles Delie et al. “Selecting Alternative Metals for Advanced Interconnects.” arXiv preprint arXiv:2406.09106 (2024).
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