The “Last Simple Node” And the Internet of Things

Power, performance and size are key targets that will enable the expected explosion of the Internet of Things (IoT).

Today, most observers see the path to that running directly through 16/14nm finFET and below for the node’s ability to manage power and size and boost integration.

Geoff Lees isn’t your average observer. The vice president and general manager of Freescale’s microcontroller business sees a different road—and it’s already open.
“28nm is where we feel the richness of mixed-signal integration, the longevity of that node will allow us to create those products,” Lees said.

Faded luster? Not quite
What? 28nm? Haven’t we moved on long ago from 28? Isn’t 28nm the Kim Kardashian of process nodes—yesterday’s thing?

Not so fast, notes Lees, who keynoted Cadence’s Mixed-Signal Technology Summit (Oct. 10).

The investment in the 28nm node in the past five years has created a situation in which a cost-effective, robust technology is a readily available option for systems designers looking at edge node devices that have stingy power requirements but performance and longevity demands.

The node at 40nm is just a little too unwieldy for these purposes, but the cost increase from 40 to 28 was not out of control. (Meanwhile, cost for 20, 16 and 14nm finFET nodes “is going off scale,” Lees said).

Lees told the audience:

“In our opinion, from the user side, a huge amount of the foundry space, particularly in 40 and 28 capacity built in the last 5 years—mostly equipment installed into later generation 300mm facilities—will be converted to 28nm. We see an enormous overhang of 28nm capacity for the next 15 years.”

The last “simple” node
This means there’s a perfect opportunity to take the time to develop the “richness of analog and RF technologies” and to have “useful time for integration without that node skipping to the next process node two three years later, requiring the whole mixed-signal ecosystem being redone again.”

“You could say that 28nm is the last simple node,” he added.

What will this enable? It will enable approaches (pictured in the photo nearby) of integrated modules for edge nodes, which need robust communications protocols, bulletproof durability, and ultra-low power consumption.

Processing power will need to be increased exponentially, on-chip RAM needs to rise from 16-20 Kbytes to 300-500 Kb, the “minimum level” needed for full security, Java, network compliance, specs, profiles and drivers, and with something up to 1MB of non-volatile memory, Lees said. Neither 40 nor 65nm nodes is capable of this level of performance and potential integration.

The 28nm node is also where MEMS integration gets more traction. Lees showed a slide describing a 2x2x.5 mm module that was a full 32-bit MCU. It featured 40mA per Mhz of dynamic power, ultra-low standby power (down to nano-amps in deep sleep), mixed-signal integration to 12 bit and an integrated temp sensor that could be calibrated to 16 bit. The device—60% mixed signal—would have been at least one board 15 years ago, Lees noted.

There’s no doubt that 16/14nm finFET will do wonders for edge-node design and the IoT, but, as Lees might have said differently, “a bird in the hand is worth two in the bush.”