Spintronics gains traction; 3D IC wireless connections; analog stacked-die.
Spintronics gains traction
The field of spintronics is gaining interest. The technology could enable a new class of spin-based devices, which combine the switching speeds of logic and the non-volatility of memory. Controlling the magnetism by means of electric fields is the key for future devices, but the ability to switch ferromagnetism technology at room temperature is challenging.
Helmholtz-Zentrum Berlin (HZB) and others have devised a new materials system to help solve the problem. Researchers have demonstrated the ability to switch on and off ferromagnetism close to room temperature by using low electric fields.
The materials system consists of a ferroelectric BaTiO3 substrate. The ferroelectricity in BaTiO3 crystals was used to tune the metamagnetic transition temperature of epitaxially-grown FeRh films.
When an external electric field was applied to the substrate, it caused strain in the crystal structure of the ferroelectric substrate, according to researchers. This impacts the thin-film FeRh, which, in turn, drives a transition between antiferromagnetic and ferromagnetic order with only a few volts, just above room temperature, according to researchers.
The results correspond to a magnetoelectric coupling by at least one order of magnitude than previous efforts. “We have found that in FeRh/BaTiO3 even a moderate electric field can produce a giant magnetization variation, arising from the electric-field-induced transformation of the FeRh from an ferromagnetic state to an antiferromagnetic state,” said Sergio Valencia, a researcher, on the HBZ Web site.
“On a broader perspective, our work emphasizes the relevance of hybrid perovskite/metal systems such as BaTiO3/FeRh for low-power spintronic architectures. In the future, it would be attractive to combine FeRh with piezoelectric elements with giant responses. The effect could be further increased and tuned to a range of operating temperatures, including room temperature, by using Palladium-substituted FeRh,” Valencia added.
3D IC wireless connections
Using through silicon vias (TSVs), 3D stacked-die technology enables high-speed and low-power devices. But TSV technology suffers from reliability and ESD issues, which, in turn, limit its maximum data rates, according to the Industrial Technology Research Institute (ITRI), at the recent IEEE International Electron Devices Meeting (IEDM) in Washington, D.C.
To solve the problem, ITRI has devised a new wireless connection scheme for stacked-die, based a perpendicular magnetic tunneling junction (MTJ) technology. The wireless or contactless technology, dubbed Magnetic-sensing Transmission Interface (MTI), offers low-power, wide-bandwidth and multi-layer wireless data transmission for 3D ICs, according to ITRI.
The MTI module consists of a micro-coil stacked with an embedded magnetic sensor. The magnetic anisotropic sensor is composed of a perpendicular magnetic tunneling junction (p-MTJ). The resistance change responds only to a vertical magnetic field.
The substrate thickness is 5μm. The vertical distance between the top micro-coil and the bottom sensor is 20μm. The multi-layer structure includes a pinned layer, free layers and a tunneling barrier. “For bi-directional inter-chip transmission, the transmitters and receivers at the top and bottom MTI modules are activated alternately, according the data transmission directions,” according to ITRI. “Unlike conventional MTJ used in MRAMs, the R-H loop of this p-MTJ exhibits no hysteresis effect. The R-H characteristic in the low field regime shows good linearity and high sensitivity.”
Analog stacked-die
Analog and mixed-signal chips based on bipolar-CMOS-DMOS (BCD) processes can be scaled to at least the 90nm node. Beyond that, BCD may be difficult to scale since analog is expected to “exhibit little if any size reduction, due to, in part, challenges with device mismatch,” according to researchers at Maxim Integrated Products.
At IEDM, Maxim presented a paper that described one solution to the problem–3D integration. Researchers devised a wafer with front-end BCD devices. Using TSVs, researchers integrated this wafer with various components. These components can be either in a wafer or a die form. They can be fabricated using an advanced CMOS or an integrated passive process.
One example of wafer-level 3D integration includes integrated capacitors and optical sensors for various applications, including ambient light and IR sensing, according to Maxim.
The integrated capacitors contain metal-insulator-metal (MIM) stacks, which fill the trenches formed in the silicon substrate. The capacitor dielectric is made from a high dielectric constant material. Integrated silicon capacitors demonstrated the highest reported capacitor density and the figure of merit (FOM), according to Maxim.
An integrated optical sensor, typically below 1mm2 in size, was also integrated. Photodiodes in the BCD process can be used for light detection. “Visible light filters are formed on top of (the) passivation of the BCD wafer,” according to the paper. “Patterning these optical layers enables red, green and blue (RGB) detection capabilities. The blue and green filters display transmittance peaks at 450nm and 530nm, respectively. The red filter shows a sharp increase in transmittance at approximately 580nm. All the three filters exhibit a transmittance increase with the wavelength increasing into the IR range. In order to filter out the IR light, additional filters are required. IR filtering shows undetectable transmission from the red edge of the visible spectrum to above 900nm.”
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