Manufacturing Bits: Nov. 1

U.S. to boost IC competitiveness
President Obama’s Council of Advisors on Science & Technology (PCAST) has launched a new semiconductor working group in the United States.

The new working group will focus on ways to strengthen the competitiveness of the U.S. semiconductor industry. It will provide recommendations to PCAST regarding the challenges facing the U.S. semiconductor industry. This includes the rapid rise of the capabilities abroad, namely China.

The group includes 11 experts in the semiconductor industry and the economy from industry, academia and government.

Image: SIA

The U.S. Semiconductor Industry Association (SIA) and others welcomed the announcement. Still to be seen, however, is if this group will have any meaningful impact. Over the years, the U.S. has launched several efforts to boost the competitiveness in the U.S. semiconductor industry. Most of these efforts have shown little or no results.

The U.S. remains ahead in many areas, namely leading-edge IC design, fab processes, among others. On the other hand, there are troubling signs in the United States.

Case in point: In August, Taiwan-based GlobalWafers entered into a definitive agreement to acquire SunEdison Semiconductor, the last major U.S.-based silicon wafer maker, for $683 million. SunEdison Semiconductor, formerly known as MEMC, has fallen on hard times amid competitive pressures in the industry.

In another example, R&D, as well as the dollars involved, continue to move offshore. One U.S. R&D organization, Sematech, was more or less disbanded several years ago. And companies from the U.S. and elsewhere are flocking to offshore R&D organizations like Singapore’s A*Star, Belgium’s Imec and France’s Leti.

And, of course, China is pouring billions of dollars into its semiconductor industry. China hopes to play catch-up in logic, memory and packaging.

“In a world where the supply chains are global, policies being pursued by other countries are posing new challenges to the U.S. semiconductor industry,” according to a blog posting from the co-chairman of the new working group, John Holdren and Paul Otellini.

“Specifically, some countries that are important in this domain are subsidizing their domestic semiconductor industry or requiring implicit transfer of technology and intellectual property in exchange for market access. Such policies could lead to overcapacity and dumping, reduce incentives for private-sector R&D in the United States, and thereby slow the pace of semiconductor innovation and realization of the economic and security benefits that such innovation could bring,” according to Holdren and Otellini.

Holdren is an assistant to the U.S. president, director of the Office of Science and Technology Policy, and co-chair of PCAST. Otellini is the former president and chief executive of Intel.

World’s lightest metal
HRL Laboratories has developed the world’s lightest metal, thereby officially propelling the venture in the Guinness World Record book for the technology.

HRL, an R&D lab venture between Boeing and General Motors, developed a microlattice structure that is approximately 100 times lighter than Styrofoam. Based on nickel phosphorus, the microlattice has a wall thickness of approximately 80nm, according to HRL.

The microlattice could be used in several applications, such as insulation, heat exchange devices, catalytic converters, airplane wings, energy-absorbent soldiers’ helmets and vehicle blast protection.

To make the structure, HRL uses what it calls a photopolymer waveguide process. Initially, a polymer microlattice template is developed. The template is then electroplated with layers of nickel-phosphorus. The polymer is chemically removed, thereby creating the microlattice.

“The point of achieving the record for lightest metal was to show the flexibility of the manufacturing process,” said Bill Carter, director of the Sensors and Materials Laboratory at HRL, on the venture’s Web site. “With the same process we can produce a strong and useful material that can be made with the density of aluminum all the way down to well below the density of air (excluding the air inside). Achieving a density at any point between those requires only a small change in the creation process. It can be done quickly, relatively inexpensively, and made to order.”

Carter added: “We’ve also been able to achieve interconnected hollow lattices with a density and surface area similar to lung tissue. If you wanted to create an artificial lung, microlattice is a very viable way of doing it.”

Spin-wave devices
Imec has presented new results supporting the development of majority gates based on spin waves, sometimes called as spintronic majority gate.

Spintronic majority gate is a futuristic device technology geared for the post-CMOS era. It could one day enable arithmetic-based circuits that are smaller and more energy-efficient than CMOS.

Majority gates, according to Imec, are devices where the state of the output is determined by the majority of the inputs. The output is based on the interference of multiple spin waves. These, in turn, propagate in a spin-wave bus.

Imec demonstrated spin waves in sub-micron-sized magnetic waveguides with wavelengths smaller than 350nm. They were traveling over a 10 micrometer in a 500nm wide waveguide. Researchers also developed a detection method for the technology. Spin waves with wavelengths down to 340nm could be detected, paving the way towards scaled spin-wave conduits.

Fork structure of a majority gate consisting of input and output magneto-electric cells integrated in a spin-wave bus. The picture shows a snapshot at t=0.8ns when inputs are 110. (Source: Imec)

“Spin-wave majority gates with micro-sized dimensions have previously been reported, however, for them to be CMOS-competitive, they must be scaled and handle waves with nanometer-sized wavelengths,” said Iuliana Radu, distinguished member of technical staff at Imec, on the R&D organization’s Web site. “We propose here a method to scale these spin-wave devices into nanometer dimensions. Today’s exceptional results will open routes towards building spin-wave majority gates that promise to outperform CMOS-based logic technology in terms of power and area reduction.”

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