Manufacturing Bits: June 16


GaN power modules Gallium-nitride (GaN) devices are emerging in several markets, such as power semiconductors and RF. GaN, a binary III-V compound, is a wide-bandgap technology, meaning it is faster and more efficient than silicon-based devices. GaN has 10 times the breakdown field strength with double the electron mobility than silicon. Generally, some GaN vendors don’t use a traditio... » read more

Manufacturing Bits: May 26


7-level nanosheets The 2020 Symposia on VLSI Technology & Circuits for the first time will be held as a virtual conference. The event, to be held from June 15-18, is organized around the theme “The Next 40 Years of VLSI for Ubiquitous Intelligence.” Among the papers at the event include advanced nanosheet transistors, 3D stacked memory devices and even an artificial iris. At the ... » read more

New Ways To Optimize Machine Learning


As more designers employ machine learning (ML) in their systems, they’re moving from simply getting the application to work to optimizing the power and performance of their implementations. Some techniques are available today. Others will take time to percolate through the design flow and tools before they become readily available to mainstream designers. Any new technology follows a basic... » read more

Memory Issues For AI Edge Chips


Several companies are developing or ramping up AI chips for systems on the network edge, but vendors face a variety of challenges around process nodes and memory choices that can vary greatly from one application to the next. The network edge involves a class of products ranging from cars and drones to security cameras, smart speakers and even enterprise servers. All of these applications in... » read more

Chiplet Momentum Rising


The chiplet model is gaining momentum as an alternative to developing monolithic ASIC designs, which are becoming more complex and expensive at each node. Several companies and industry groups are rallying around the chiplet model, including AMD, Intel and TSMC. In addition, there is a new U.S. Department of Defense (DoD) initiative. The goal is to speed up time to market and reduce the cost... » read more

Going On the Edge


Emmanuel Sabonnadière, chief executive of Leti, sat down with Semiconductor Engineering to talk about artificial intelligence (AI), edge computing and chip technologies. What follows are excerpts of that conversation. SE: Where is AI going in the future? Sabonnadière: I am a strong believer that edge AI will change our lives. Today’s microelectronics are organized with 80% of things i... » read more

Manufacturing Bits: Dec. 16


Imec-Leti alliance At the recent IEEE International Electron Devices Meeting (IEDM), Imec and Leti announced plans to collaborate in select areas. The two R&D organizations plan to collaborate in two areas—artificial intelligence (AI) and quantum computing. Imec and Leti have been separately working on AI technologies based on various next-generation memory architectures. Both entitie... » read more

Manufacturing Bits: Oct. 22


3.5D chip packaging In a recent paper, PacTech has described a vertical laser assisted bonding process for use in developing advanced 3.5D chip packages. Laser assisted bonding (LAB) is an interconnection technology used in IC packaging. It uses a laser as a thermal energy, which in turn connects a die bump and a substrate pad, according to Amkor, which is the original developer of LAB tech... » read more

Week In Review: Manufacturing, Test


Fab tools A consortium of 31 companies have launched a new project, called the “Advanced packaging for photonics, optics and electronics for low cost manufacturing in Europe.” The program is referred to as APPLAUSE. With a budget of 34 million euros, the project is being coordinated by ICOS, a division of KLA. “APPLAUSE will focus on advanced optics, photonics and electronics packagin... » read more

The Race To Next-Gen 2.5D/3D Packages


Several companies are racing each other to develop a new class of 2.5D and 3D packages based on various next-generation interconnect technologies. Intel, TSMC and others are exploring or developing future packages based on one emerging interconnect scheme, called copper-to-copper hybrid bonding. This technology provides a way to stack advanced dies using copper connections at the chip level,... » read more

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