Manufacturing Bits: Nov. 25

Lidar-on-a-chip; resistive-gate finFETs; spin 300mm qubits.


At the upcoming IEEE International Electron Devices Meeting (IEDM), Samsung will present a paper on the industry’s first single-chip lidar beam scanner. (Go to this link and then look for paper 7.2, “Single-Chip Beam Scanner with Integrated Light Source for Real-Time Light Detection and Ranging,” J. Lee et al, Samsung.)

Lidar, or light imaging, detection, and ranging, uses pulsed laser light to measure distances. This technology is used for autonomous vehicles, robotics and other applications.

Lidar is often compared to radar. “While radar systems determine the distance to an object by firing radio waves at it and measuring the time it takes their reflections to return, lidar uses laser light instead. It’s extremely fast and lends itself to sophisticated data processing, meaning that differences in laser light return times and wavelengths can be used to make detailed 3D representations of a target,” said Jisan Lee, a researcher at Samsung in an abstract that describes the paper. Others contributed to the work.

The drawback with lidar is that it’s expensive and clunky. Often seen on top of a vehicle, lidar systems are large. They use mechanical beam scanners with motors and rotating mirrors.

At IEDM, Samsung will describe a single-chip solid-state 2D beam scanner, which enables 10-m lidar operations at 20 frames per second (fps). “The beam scanner is integrated with a fully functional 32-channel optical phased array (OPA), 36 optical amplifiers, and a tunable laser, all on a 7.5 × 3-mm2 single chip fabricated using III-V-on-silicon processes,” Lee said.

With a wavelength of 1.3μm, Samsung’s lidar system has a resolution of 120 (horizontal) × 20 (vertical) lines, scan range up to 10-meters and a scan speed of 20 fps.

Resistive-gate finFETs
At IEDM, National Chiao Tung University, National Central University and TSMC will present a paper on a resistive-gate finFET technology for hardware security applications. (Go to this link and then look for paper 39.3, “Novel Concept of Hardware Security Using Gate-switching FinFET Nonvolatile Memory to Implement True-Random-Number Generator,” W. Yang et al, National Chiao Tung University.)

Researchers have implemented a gate-switching resistance memory with a finFET, enabling a true random number generator (TRNG). “A true random number generator (TRNG) is a hardware component that generates a string of random bits, which can be used as a cryptographic key. It relies on intrinsic stochasticity in physical variables as a source of randomness,” according to a recent paper from the University of Massachusetts.

This technology is important. “Internet attack incidents have increased dramatically in recent years. Software has been used to generate encryption keys for digital devices, but such passwords are often logical and easily hacked. A hardware-based true random number generator (TRNG) that relies on the randomness of physical phenomena like manufacturing process variations to generate encryption keys can’t be easily hacked,” said W. Y. Yang, the lead author of the paper.

An embedded ReRAM or RRAM is one candidate for a TRNG. “However, existing RRAM-based TRNGs don’t have all the required features, such as high speed operation, highly reliable performance, and simple circuit designs,” Yang said. “Instead of ReRAM, a NOR-type RG-finFET memory core along with the peripheral circuit on a 40nm CMOS platform will be demonstrated.”

A National Chiao Tung University-led team will describe a TRNG device architecture comprising a one-transistor resistance switching memory as a core and a 40nm peripheral circuit. “The core is an integration of a metal-insulator-metal (MIM) capacitor on FinFET platform – essentially, a NOR-type resistance-gate integrated with the FinFET. Its drain current is randomly distributed as a result of time-varying conducting filaments, and the researchers say it is an ideal entropy source for a TRNG,” Yang said.

300mm qubits
Quantum computing is different than traditional computing. In classical computing, the information is stored in bits, which can be either a “0” or “1”. In quantum computing, information is stored in quantum bits, or qubits, which can exist as a “0” or “1” or a combination of both.

In quantum computing, a qubit is the basic unit of quantum information. A qubit is a two-state (or two-level) quantum-mechanical system.

The superposition state enables a quantum computer to perform millions of calculations at once, enabling it to outperform a traditional system. But quantum computing is still in its infancy and has a long way to go.

“Qubits are often made from quantum dots, particles a few nanometers in size made from semiconductors. Silicon-based quantum-dot qubit systems are attractive for potential use in large-scale quantum processors because they have demonstrated relatively long coherence times and high-fidelity operation in laboratory settings, and because silicon technology is widely used and economical compared to other material systems. But cryogenic material properties and other aspects of qubit design are still not well-understood, and a design platform flexible enough to use in studies of silicon qubit characteristics is needed,” according to Roy Li from Imec in an abstract.

At IEDM, Imec will describe a qubit manufacturing platform based on 300mm silicon wafer fabrication technology instead of specialized laboratory processes. (Go to this link and then look for paper Paper 38.3, “A Flexible 300mm Integrated Si MOS Platform for Electron- and Hole-Spin Qubits Exploration,” R. Li et al, imec-KU Leuven.)

“It uses both optical and electron-beam lithography to fabricate silicon spin qubits, and enables on-the-fly layout design modifications for devices having either n- or p-type ohmic implants, pitches <100nm, and uniform critical dimensions down to 30nm,” Li said.

Imec says the design platform enabled them to achieve nearly 100% device yields for qubits with 30nm spacings. They plan to use it to incorporate additional materials and structures into qubits for further study, and to improve cryogenic characterizations.

Find more previews of the upcoming IEDM here
Intel’s gate-all-around FETs; vacuum transistors; 3D ICs

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