Material Solutions For FOWLP Die Shift And Wafer Warpage

For FOWLP technology, a number of process factors come into play when considering the best bonding/debonding approach.


By Shelly Fowler

Today’s fan-out wafer-level packaging (FOWLP) processes use organic substrates composed of epoxy mold compound (EMC) created using a thermal compression process. EMC wafers are a cost-effective way to achieve lower-profile packages without using an inorganic substrate to produce chip packages that are thinner and faster without the need for interposers or through-silicon-vias (TSVs).

One packaging approach using embedded die technology (eWLB) for FOWLP is a chip-first (mold-first) die assembly in a face-down configuration on an intermediate carrier wafer. In this approach, dies are copper bumped and placed face-up on the temporary carrier. After over-molding, EMC grinding allows access to the now-exposed copper bumps. The redistribution layer (RDL) is applied, the wafer is released from the temporary carrier, and it is then diced for package singulation.

FOWLP technology challenges
Following EMC processing, several challenges continue to face FOWLP technology. In particular, a number of process factors come into play when considering the best bonding/debonding approach.

First, a low-temperature debonding process is key; an out-of-range temperature can negatively influence stack stress, warpage and die-shift behavior. The rheological properties of the bonding materials – i.e., those impacting deformation and flow – are also important, as they can impact these behaviors, as well as the package topography and reliability. Minimizing and/or eliminating these challenges can result in improved yields.

Figure 1 provides an overview of the specific chip-first face-down process used to investigate the use various release and thermoplastic bonding materials. First, temporary bonding and release materials were spin-coated onto 200-mm glass wafers; chips were placed on the bonding material; and each wafer was over-molded with EMC and thermally cured. The molded wafers were then debonded either mechanically or by laser ablation and cleaned to remove residual bonding material. For evaluation, the wafers were finally characterized for die shift, warpage, and die stand-off measurement.

This configuration lends itself well to investigating die shift and deformation using various release and thermoplastic bonding materials. Combinations using different EMC products and carriers with various coefficients of thermal expansion (CTEs) were also included. Successful pairs then underwent carrier release using either mechanical or laser ablation release technology. This blog summarizes the evaluation of various factors and their impact on the chip-first, face-down approach, taking these challenges into consideration.

Figure 1. Chip-first face-down FOWLP process flow for evaluating bonding material options.

Once assembly optimization was achieved, various release materials and processes were added in to assess their impact on die-shift, wafer warpage and die stand-off. These included mechanical and laser release materials and bonding materials, with thermal release tape as a control. Figure 2 provides a summary of the data garnered during material experimentation to mitigate each of these challenges.

Die shift
Die shift describes movement of the chip after placement during compression molding, debonding and cooling of the reconfigured wafer. Due to the different CTEs of the materials involved and in combination with the temperature profile of the different process steps, dies will shift from their originally assembled position. In addition to the described effect, sliding of the dies during molding can occur depending upon the die size and adhesion of the dies to the release tape and the flow behavior of the EMC and the related forces on the dies during compression molding.

Die stand-off
Die stand-off or die protrusion is caused by shrinkage of the epoxy mold compound during the thermal cure and compression molding process. Embedded die whose surface extends above or below the EMC surface limits multichip integration and RDL scaling.

A large variety of epoxy mold compounds are currently available for use in FOWLP processes. The properties of Young’s modulus, CTE, and glass transition temperature (Tg) have a significant effect on EMC warpage. Wafer warpage can be reduced by lowering the Young’s modulus, CTE, and increasing the Tg of the molding compound.

Figure 2. The charts provide summaries of the data gathered with respect to (a) die shift, (b) die stand-off, and (c) wafer warpage using several different release and bonding material options. Combinations using EMC 1 yielded the least amount of die shift and wafer warpage, while those using BrewerBOND 305 material resulted in the least amount of die stand-off.

In looking at how to address the various challenges associated with FOWLP, the ideal chip attachment scheme should minimize die shift and die stand-off. An ideal die attach material should provide adequate adhesion to the EMC wafers without inducing excessive substrate warp, while permitting a suitable debonding process, including complete residue removal. The attachment scheme must also survive any thermal, mechanical, and chemical processes that are performed prior to carrier release. The bonding materials must also have sufficient adhesion to the EMC material to overcome such stress without bond failure.

Within this study, the replacement of thermal release tape by temporary adhesives in combination with room-temperature laser or mechanical debonding was successfully demonstrated. Careful material and carrier selection can help ensure low mold wafer warpage, die stand-off, and die shifting. The proposed technology using temporary release and bonding materials may be a suitable process alternative to thermal release tape for a chip-first, face-down FOWLP approach.

Shelly Fowler is a principal applications engineer at Brewer Science.

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