tag: Cadence

Making Sure A Heterogeneous Design Will Work
By Ed Sperling - 03 Dec, 2018 - Comments: 0

An explosion of various types of processors and localized memories on a chip or in a package is making it much more difficult to verify and test these devices, and to sign off with confidence. In addition to timing and clock domain crossing issues, which are becoming much more difficult to deal with in complex chips, some of the new devices are including AI, machine learning or deep learning... » read more

Virtual Design Chains At The EDA Forum
By Frank Schirrmeister - 29 Nov, 2018 - Comments: 0

The German edacentrum’s EDA Forum was held in Berlin, Germany, in early November. It was very interesting to see the design chain effects in the automotive domain, very visible in a panel yours truly was part of, together with Audi, Bosch, Infineon, MicroChip, Synopsys, Mentor, and the BMBF. Driven from the top of the design chain, the direction is clearly to go more virtual to optimize the c... » read more

Looking Beyond The CPU
By Brian Bailey - 29 Nov, 2018 - Comments: 0

CPUs no longer deliver the same kind of of performance improvements as in the past, raising questions across the industry about what comes next. The growth in processing power delivered by a single CPU core began stalling out at the beginning of the decade, when power-related issues such as heat and noise forced processor companies to add more cores rather than pushing up the clock frequency... » read more

Bare Metal Programming
By Ann Mutschler - 29 Nov, 2018 - Comments: 0

As the need for safety and security grows across application areas such as automotive, industrial, and in the cloud, the semiconductor industry is searching for the best ways to protect these systems. The big question is whether it is better to build security and safety into hardware, into software, or both. The answer isn't entirely clear yet, but one of the options under consideration is s... » read more

IP Tracking and Management
By Brian Bailey - 29 Nov, 2018 - Comments: 0

Semiconductor Engineering sat down to discuss IP tracking and management with Ranjit Adhikary, VP of marketing for ClioSoft; Jim Bruister, director digital systems (since retired) at Silvaco; Marc Greenberg, product marketing group director at Cadence; and Kelvin Low, VP of Marketing at Arm. What follows are excerpts from that conversation. SE: What is the scope of the problem? What are ... » read more

Delivering Superior Throughput For EDA Verification Workloads
By Cadence - 28 Nov, 2018 - Comments: 0

Perhaps no industry is more competitive than modern electronics manufacturing and chip design. As consumers, we take it for granted that electronic devices continue to get faster, cheaper, and more capable with each generation. From smart watches to industrial controls to electronic heart-rate monitors, electronics manufacturers are challenged to build smarter, more complex devices leveraging s... » read more

Blog Review: Nov. 28
By Jesse Allen - 28 Nov, 2018 - Comments: 0

Arm's Bo Eyole contends that the next generation of machine learning algorithms will have to deal with a vast amount of messy, unlabeled data and takes a look at some of the techniques, such as reinforcement learning and evolutionary computing, now being explored. Cadence's Paul McLellan considers how IP systems are increasingly limited by memory bandwidth rather than compute power and where... » read more

Getting Down To Business On Chiplets
By Ed Sperling - 26 Nov, 2018 - Comments: 0

Government agencies, industry groups and individual companies are beginning to rally around various chiplet models, setting the stage for complex chips that are quicker and cheaper to build using standardized interfaces and components. The idea of putting together different modules like LEGOs has been talked about for the better part of a decade. So far, only Marvell has used this concept co... » read more

Overcoming Gender Stereotypes In Tech
By Ann Mutschler - 23 Nov, 2018 - Comments: 5

Gender inequality in the workplace is more complex and deep-rooted than most studies have shown, and efforts to address those issues are only scratching the surface. The problem runs deeper than just moving women into upper management. It extends all the way through organizations in ways that aren't always obvious. “I've been talking to senior women in engineering and junior women in en... » read more

Blog Review: Nov. 21
By Jesse Allen - 21 Nov, 2018 - Comments: 0

Cadence's Paul McLellan looks at why specialized architectures will be the future of processor development, why general purpose processors are a poor match for AI, and other highlights from the recent Linley Processor Conference. Mentor's Harry Foster focuses on what's happening in FPGA design and the factors that are adding to increasing design and verification complexity. Synopsys' Lewi... » read more

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