An alarming number of disruptive new technologies are under development.
After higher aspect-ratio finFETs and higher mobility SiGe and III-V materials, the industry will move to lateral nanowires and then to vertical nanowire transistors, and to new tunnel junction FETs or spin wave architectures ─ or to various combinations of these technologies for different applications, reported An Steegan, Imec senior vice president of process technology, during SEMICON West 2015. Intermolecular scientific advisor Raj Jammy outlined a similar roadmap. “Scaling these finFETs and nanowires will require high aspect-ratio structures and selective deposition,” said Jammy, noting those slower processes will also likely mean higher costs.
Vertical nanowires. Source and copyright: Imec.
Of course, a lot of this is the early screening by research organizations, doing what they should be doing ─ trying to figure out how to get to 5nm and 3nm devices. But it’s also a daunting amount of disruptive change at each new node, not that many years away, even aside from the issues of EUV, cobalt interconnects with self-assembled monolayers, and the host of other new technologies for memory and chip stacking that were the talk of SEMICON West. Let’s hope that a clear path arises to narrow down the potential pathways soon, because there are far more options than the supply chain can realistically afford to develop. “Equipment makers are spending only about 10 percent of revenues on R&D in recent years, noted Jammy. “We’ll need some revolutionary lower cost approaches to enable future nodes.”
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