Reprogrammable, Reprogrammable, Reprogrammable

By Alex Grove

I like FPGAs. My first experience with an FPGA was my university final year project where I demonstrated BIST with four Xilinx© 3000 devices; this was before FPGAs had JTAG built in. Filling up these devices with ViewDraw schematics required many hours in front of a terminal. Fast track to today’s advances such as Xilinx UltraScale and Vivado HLx, and I hope you would agree things have moved on quite a bit.

Amid all this changes, however, there are some things that have remained constant. Those are the three things that are great about FPGAs: they are reprogrammable, reprogrammable, and, they are reprogrammable.

So how is this capability utilized? Here are three examples:

Electronic products using FPGAs
It is important not look at FPGAs as some poor cousin of an ASIC. This view is from the days of LSI Logic and Xilinx marketing battles, when FPGAs were used for mopping up “glue logic”. Today an FPGA provides a massively parallel programmable digital platform with a lot of silicon IP, such as high-performance interfaces. This capability is widely used by many industries now; it is not solely driven by the volume of parts. Today, you even find FPGAs in consumer products.

However when I look at verification of FPGAs, I am always mindful these are not ASICs and so most likely do not have the same verification requirements. So I question if we should look to replicate the techniques of ASIC verification for FPGAs. As an FPGA is a programmable device, is it not software? What I have found interesting over the last few years, is how continuous integration (CI) and other Agile-like methods typical of software development are being adopted by FPGA design teams.

FPGAs for ASIC prototyping
All ASICs have in some way been tested using FPGAs. This may be as a pre-silicon development platform or IP that has been at-speed tested using an FPGA. Enabled by Moore’s Law and new technologies such Xilinx’s stacked silicon interconnect (SSI), the capability of FPGAs has exploded over the last 10 years. This has led to larger and larger devices, such as Xilinx’s latest UltraScale 440 device with a whopping 28 M ASIC gates equivalent (a conservative 60% utilization). This growth in capacity has had a big impact for FPGA prototypes, in particular addressing the partitioning problem. For example, today the digital component of a wireless mixed-signal device now comfortably fits in a single FPGA device.

FPGAs as a functional verification platform
Over the last few years, we have seen FPGAs now being used as a functional verification platform. The key difference to that of ASIC prototyping is the RTL on the FPGA system has not been fully verified, so we expect to find bugs. This is an area Aldec has been working in with our FPGA co-emulator. Historically, these systems were used with a SystemC TLM testbench and a common use case was hybrid emulation with processor model such as ARM’s Fast Models. Such systems provided a pre-silicon development platform typically used for firmware (hardware dependent software) development. What we are now seeing is use cases extending into areas where simulation or big box accelerators are common, such UVM acceleration. One of the reasons given by users is the unmatched verification capability FPGAs provide. This is the product of two key attributes that FPGA systems provide: MHz performance, and the ability to replicate the systems.

To find out more about FPGA and verification, join me at this year’s Verification Futures in my hometown of Reading, UK. Last year there was a lot of discussion on the topic of FPGAs and verification. This year I am hoping to have the opportunity to share our experiences as part of the EDA response.

Alex Grove is an applications specialist at FirstEDA. He has worked for Synopsys, ARM’s EDA business unit, Synplicity and Mentor Graphics.