Foundries Expand Planar Efforts

By Mark LaPedus - 18 Jun, 2015 - Comments: 0

Competition is heating up in the leading-edge foundry business, as vendors begin to ramp up their new 16nm/14nm finFET processes. But that’s not the only action in the foundry arena. They are also expanding their efforts in the leading-edge planar market by rolling out new 28nm and 22nm processes. On one front, TSMC is offering new 28nm variants, based on bulk CMOS technology. And on an... » read more

Re-Engineering The FinFET

By Mark LaPedus - 13 Nov, 2014 - Comments: 0

The semiconductor industry is still in the early stages of the [getkc id="185" kc_name="finFET"] era, but the [getkc id="26" kc_name="transistor"] technology already is undergoing a dramatic change. The fins themselves are getting a makeover. In the first-generation finFETs, the fins were relatively short and tapered. In the next wave, the fins are expected to get taller, thinner and more re... » read more

Why Is My Device Better Than Yours?

By Ed Sperling - 23 Oct, 2014 - Comments: 0

Differentiation is becoming a big problem in the semiconductor industry with far-reaching implications that extend well beyond just chips. The debate over the future of [getkc id="74" comment="Moore's Law"] is well known, but it's just one element in a growing list that will make it much harder for chip companies, IP vendors and even software developers to stand out from the pack. And withou... » read more

IBM Unloads Chip Biz To GF

By The SE Staff - 20 Oct, 2014 - Comments: 0

By Ed Sperling & Mark LaPedus After months of on-again, off-again negotiations, [getentity id="22306" comment="IBM"] agreed to hand over its Microelectronics unit to [getentity id="22819" comment="GlobalFoundries"] for $1.5 billion—meaning IBM will actually pay GlobalFoundries that amount to get rid of what has become an albatross for Big Blue. To really sweeten the deal, GlobalFoundr... » read more

Who’s Winning The FinFET Foundry Race?

By Mark LaPedus - 14 Aug, 2014 - Comments: 5

The leading-edge foundry business is challenging. For starters, foundry vendors require vast resources, gigantic fabs and lots of know-how. And yet, it’s still difficult to make money in this business. That has certainly proven to be the case in the planar transistor era, but the challenges and costs are escalating as foundry vendors begin to ramp up finFET technologies at the 16nm/14nm no... » read more

28nm FinFETs?

By Brian Bailey - 10 Jul, 2014 - Comments: 5

One star of the upcoming 14/16nm process node is the introduction of the finFET, a fundamentally new transistor that overcomes many of the limitations associated with planar transistors. While these devices are more complex to construct—and the physical extraction processes associated with them is more complex due to an increased number of resistances and capacitances—they are seen as a tra... » read more

Can Intel Dethrone The Foundry Giants?

By Mark LaPedus - 12 Dec, 2013 - Comments: 3

The leading-edge foundry business isn’t for the faint of heart. It requires deep pockets and sound technology to keep pace in the chip-scaling race. And despite pouring billions of dollars into new fabs and processes, foundries are competing for fewer customers at each node. Given the difficult business conditions, only a handful of vendors can afford to compete in the high-end foundry bus... » read more

Intel Vs. Everyone Else

By Ed Sperling - 08 Jul, 2013 - Comments: 0

A report from ABI Research is starting to gain some attention. For cynics, the question of why now seems perfectly reasonable, considering the report was released early last month and promptly fell well under the semiconductor industry’s radar. But cynicism aside, it’s still interesting to compare specs for chips using ARM’s Cortex-A15, A9 and Qualcomm’s ARM-based Krait. The bottom ... » read more

EUV Flare And Proximity Modeling And Model-Based Correction

By Various Writers - 16 May, 2013 - Comments: 0

The introduction of EUV lithography into the semiconductor fabrication process will enable a continuation of Moore’s law below the 22 nm technology node. EUV lithography will, however, introduce new and unwanted sources of patterning distortions which must be accurately modeled and corrected on the reticle. Flare caused by scattered light in the projection optics is expected to result in seve... » read more

Soitec’s Wafer Roadmap for Fully Depleted Planar and 3D/FinFET

By Various Writers - 24 May, 2012 - Comments: 0

The following is a special guest post by Steve Longoria, Senior VP of Worldwide Business Development at Soitec. It first appeared as part of the Advanced Substrate News special edition on FD-SOI industrialization. ~~ Today’s semiconductor industry is moving through several challenging transitions that are creating a significant opportunity for Soitec to bring incremental value to th... » read more

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Knowledge Centers
Entities, people and technologies explored

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3.5D: The Great Compromise

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eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

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