tag: 3D-IC

2020: A Turning Point In The Chip Industry
By Brian Bailey - 28 Dec, 2020 - Comments: 3

At the start of 2020, most of the industry was upbeat and sales forecasts for the year were good. Then the pandemic hit, and fear gripped most of the industry — but not for long. New markets emerged, demand increased, and the levels of innovation went far beyond what had been forecast. While hope is on the horizon that the virus will be contained during 2021, life will not return to the ol... » read more

Stretching Engineers
By Brian Bailey - 22 Dec, 2020 - Comments: 1

Engineering has one constant — you innovate or fall by the wayside. That is true both for the things that are designed and for the engineers who design and build them. Today’s systems are putting new strains on engineers who can no longer be "tall and thin" or "short and fat." Those descriptions pertain to an engineer who is either highly specialized or one who has much broader experience. ... » read more

Variation Threat In Advanced Nodes, Packages Grows
By Ed Sperling - 21 Dec, 2020 - Comments: 0

Variation is becoming a much bigger and more complex problem for chipmakers as they push to the next process nodes or into increasingly dense advanced packages, raising concerns about the functionality and reliability of individual devices, and even entire systems. In the past, almost all concerns about variation focused on the manufacturing process. What printed on a piece of silicon didn't... » read more

Designs Beyond The Reticle Limit
By Brian Bailey - 12 Nov, 2020 - Comments: 0

Designs continue to grow in size and complexity, but today they are reaching both physical and economic challenges. These challenges are causing a reversal of the integration trend that has provided much of the performance and power gains over the past couple of decades. The industry, far from giving up, is exploring new ways to enable designs to go beyond the reticle size, which is around 8... » read more

A Renaissance For Semiconductors
By Brian Bailey - 29 Oct, 2020 - Comments: 2

Major shifts in semiconductors and end markets are driving what some are calling a renaissance in technology, but navigating this new, multi-faceted set of requirements may cause some structural changes for the chip industry as it becomes more difficult for a single company to do everything. For the past decade, the mobile phone industry has been the dominant driver for the semiconductor eco... » read more

Confusion Grows Over Packaging And Scaling
By Ann Mutschler - 15 Oct, 2020 - Comments: 0

The push toward both multi-chip packaging and continued scaling of digital logic is creating confusion about how to classify designs, what design tools work best, and how to best improve productivity and meet design objectives. While the goals of design teams remains the same — better performance, lower power, lower cost — the choices often involve tradeoffs between design budgets and ho... » read more

New Architectures, Much Faster Chips
By Ed Sperling and Ann Mutschler - 31 Aug, 2020 - Comments: 0

The chip industry is making progress in multiple physical dimensions and with multiple architectural approaches, setting the stage for huge performance increases based on more modular and heterogeneous designs, new advanced packaging options, and continued scaling of digital logic for at least a couple more process nodes. A number of these changes have been discussed in recent conferences. I... » read more

Monitoring Chips After Manufacturing
By Brian Bailey - 19 Aug, 2020 - Comments: 2

New regulations and variability of advanced process nodes are forcing chip designers to insert additional capabilities in silicon to help with comprehension, debug, analytics, safety, security, and design optimization. The impact of this will be far-reaching as the industry discusses what capabilities can be shared between these divergent tasks, the amount of silicon area to dedicate to it, ... » read more

Redefining The Power Delivery Network
By Brian Bailey - 13 Aug, 2020 - Comments: 3

Reliably getting power around a package containing multiple dies, potentially coming from multiple sources, or implemented in diverse technologies, is becoming much more difficult. The tools and needed to do this in an optimized manner are not all there today. Nevertheless, the industry is confident that we can get there. For a single die, the problem has evolved slowly over time. "For a ... » read more

Preparing For A Barrage Of Physical Effects
By Ann Mutschler - 13 Aug, 2020 - Comments: 0

Advancements in 3D transistors and packaging continue to enable better power and performance in a given footprint, but they also require more attention to physical effects stemming from both increased density and vertical stacking. Even in planar chips developed at 3nm, it will be more difficult to build both thin and thick oxide devices, which will have an impact on everything from power to... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2024 SMG   |  Terms of Service  |  Privacy Policy