tag: 5nm

Week In Review: Manufacturing, Test
By Mark LaPedus - 19 Apr, 2019 - Comments: 0

Chipmakers Here comes the battle between 5nm and 6nm processes at two foundry vendors—Samsung and TSMC. Meanwhile, Intel is behind and scrambling to get 10nm out the door. (Intel's 10nm is equivalent to 7nm from the foundries.) Last week, TSMC announced delivery of a complete version of its 5nm design infrastructure. TSMC’s 5nm technology is based on a finFET. This week, Samsung anno... » read more

The Precision Knob
By Ed Sperling - 18 Apr, 2019 - Comments: 0

Precision used to be a goal, but increasingly it is being used as a tool. This is true for processing and algorithms, where less precision can greatly improve both performance and battery life. And it is true in manufacturing, where more precision can help minimize the growing impact of variation. Moreover, being able to dial precision up or down can help engineers see the impact on a system... » read more

Lithography Options For Next-Gen Devices
By Mark LaPedus - 18 Apr, 2019 - Comments: 2

Chipmakers are ramping up extreme ultraviolet (EUV) lithography for advanced logic at 7nm and/or 5nm, but EUV isn’t the only lithographic option on the table. For some time, the industry has been working on an assortment of other next-generation lithography technologies, including a new version of EUV. Each technology is different and aimed at different applications. Some are here today, w... » read more

Moore’s Law Now Requires Advanced Packaging
By Ed Sperling - 18 Apr, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss advanced packaging with Calvin Cheung, vice president of engineering at ASE; Walter Ng, vice president of business management at UMC; Ajay Lalwani, vice president of global manufacturing operations at eSilicon; Vic Kulkarni, vice president and chief strategist in the office of the CTO at ANSYS; and Tien Shiah, senior manager for memory at Samsung. W... » read more

More Memory And Processor Tradeoffs
By Ed Sperling - 11 Apr, 2019 - Comments: 0

Creating a new chip architecture is becoming an increasingly complex series of tradeoffs about memories and processing elements, but the benefits are not always obvious when those tradeoffs are being made. This used to be a fairly straightforward exercise when there was one processor, on-chip SRAM and off-chip DRAM. Fast forward to 7/5nm, where chips are being developed for AI, mobile ph... » read more

Low Power Meets Variability At 7/5nm
By Ann Mutschler - 11 Apr, 2019 - Comments: 0

Power-related issues are beginning to clash with process variation at 7/5nm, making timing closure more difficult and resulting in re-spins caused by unexpected errors and poor functional yield. Variability is becoming particularly troublesome at advanced nodes, and there are multiple causes of that variability. One of the key ones is the manufacturing process, which can be affected by every... » read more

The 7nm Pileup
By Ed Sperling - 04 Apr, 2019 - Comments: 1

The number of 7nm designs is exploding. Cadence alone reports 80 new 7nm chips under design. So why now, and what does this all mean? First of all, 7nm appears to be the next 28nm. It's a major node, and it intersects with a number of broad trends that are happening across the industry, all of which involve AI in one way or another. The big question now is how many of them will survive long ... » read more

Single Vs. Multi-Patterning EUV
By Mark LaPedus - 25 Mar, 2019 - Comments: 5

Extreme ultraviolet (EUV) lithography finally is moving into production, but foundry customers now must decide whether to implement their designs using EUV-based single patterning at 7nm, or whether to wait and instead deploy EUV multiple patterning at 5nm. Each patterning scheme has unique challenges, making that decision more difficult than it might appear. Targeted for 7nm, single pattern... » read more

New Design Approaches At 7/5nm
By Ed Sperling - 04 Mar, 2019 - Comments: 0

The race to build chips with a multitude of different processing elements and memories is making it more difficult to design, verify and test these devices, particularly when AI and leading-edge manufacturing processes are involved. There are two fundamental problems. First, there are much tighter tolerances for all of the components in those designs due to proximity effects. Second, as a re... » read more

Comparative Stochastic Process Variation Bands For N7, N5, And N3 At EUV
By KLA - 21 Feb, 2019 - Comments: 0

By Alessandro Vaglio Preta, Trey Gravesa, David Blankenshipa, Kunlun Baib, Stewart Robertsona, Peter De Bisschopc, John J. Biaforea a) KLA-Tencor Corporation, Austin, TX 78759, U.S.A. b) KLA-Tencor Corporation, Milpitas, CA 95035, U.S.A. c) IMEC, Kapeldreef 75, 3000, BE ABSTRACT Stochastics effects are the ultimate limiter of optical lithography technology and are a major concern for n... » read more

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