7nm Fab Challenges

By Mark LaPedus - 21 Apr, 2016 - Comments: 3

Leading-edge foundry vendors have made the challenging transition from traditional planar processes into the finFET transistor era. The first [getkc id="185" kc_name="finFETs"] were based on the 22nm node, and now the industry is ramping up 16nm/14nm technologies. Going forward, the question is how far the finFET can be scaled. In fact, 10nm finFETs from Samsung are expected to ramp by ye... » read more

Foundries Expand Their Scope

By Ed Sperling - 21 Apr, 2016 - Comments: 0

By Ed Sperling & Mark LaPedus Major foundries are stepping up their offerings across a wide swath of technology nodes, specialty processes and advanced packaging—a recognition that end markets are fragmenting and that the path forward includes a mix of new and established processes. As the smart phone market flattens, there is no single "next big thing" to drive volume at the most ... » read more

Insider’s Guide To Fab Technology

By Mark LaPedus - 21 Apr, 2016 - Comments: 0

Semiconductor Engineering sat down to discuss fab technology with Matt Paggi, vice president of advanced technology development at GlobalFoundries. What follows are excerpts of that conversation. SE: What’s driving demand for semiconductors today? Paggi: You are aware of what the worldwide semiconductor revenue growth is this year. There are peaks and valleys in the worldwide semiconduc... » read more

Samsung Foundry’s Business Strategy

By Kelvin Low - 21 Apr, 2016 - Comments: 0

Wow! 2016 is off to a fast start. While visiting headquarters in Korea recently, I sat down with four members of Samsung Foundry’s global leadership team to discuss several key initiatives this year. Below are key excerpts from those conversations. Samsung Foundry’s Business Strategy Q: Can you expand on some of the macro business trends affecting the fabless/foundry industry? Jong S... » read more

Foundation IP For 7nm FinFETs: Design And Implementation

By Synopsys - 13 Apr, 2016 - Comments: 0

Learn about the challenges of IP design and implementation for 7nm FinFETs. Along with the performance and area benefits that the node brings, designers must understand the significant technical challenges stemming from increasing variability associated with tighter pitches and more complex lithography steps. Design for variability and reliability considerations will require comprehensive model... » read more

Where Is Next-Gen Lithography?

By Mark LaPedus - 11 Apr, 2016 - Comments: 1

Semiconductor Engineering sat down to discuss lithography and photomask technologies with Greg McIntyre, director of the Advanced Patterning Department at Imec; Harry Levinson, senior fellow and senior director of technology research at GlobalFoundries; Uday Mitra, vice president and head of strategy and marketing for the Etch Business Unit and Patterning Module at Applied Materials; Naoya Haya... » read more

Where Is Next-Gen Lithography?

By Mark LaPedus - 31 Mar, 2016 - Comments: 2

Semiconductor Engineering sat down to discuss lithography and photomask technologies with Greg McIntyre, director of the Advanced Patterning Department at [getentity id="22217" comment="Imec"]; Harry Levinson, senior fellow and senior director of technology research at [getentity id="22819" comment="GlobalFoundries"]; Uday Mitra, vice president and head of strategy and marketing for the Etch Bu... » read more

Pain Points At 7nm

By Ed Sperling - 24 Mar, 2016 - Comments: 3

Early work has begun on 7nm. Process technology has progressed to the point where IP and tools are being qualified. There is still a long way to go. But as companies begin engaging with foundries on this process node—[getentity id="22586" comment="TSMC"] is talking publicly about it, but [getentity id="22846" e_name="Intel"], [getentity id="22819" comment="GlobalFoundries"] and [getentity ... » read more

Coherency, Cache And Configurability

By Ann Mutschler - 24 Mar, 2016 - Comments: 0

Coherency is gaining traction across a wide spectrum of applications as systems vendors begin leveraging heterogeneous computing to improve performance, minimize power, and simplify software development. Coherency is not a new concept, but making it easier to apply has always been a challenge. This is why it has largely been relegated to CPUs with identical processor cores. But the approach ... » read more

EUV Resists Move Forward

By Katherine Derbyshire - 23 Mar, 2016 - Comments: 0

Improvements in EUV exposure sources and exposure tools are shifting the industry’s focus to other components of the lithography process. As noted last year, one of the key areas is photoresists. But advanced photoresists face significant challenges, due to the need to balance sensitivity, etch selectivity, and resolution. This year’s SPIE Advanced Lithography conference featured promis... » read more

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tag: 7nm

7nm Fab Challenges

Foundries Expand Their Scope

Insider’s Guide To Fab Technology

Samsung Foundry’s Business Strategy

Foundation IP For 7nm FinFETs: Design And Implementation

Where Is Next-Gen Lithography?

Where Is Next-Gen Lithography?

Pain Points At 7nm

Coherency, Cache And Configurability

EUV Resists Move Forward

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