Designing Ultra Low Power AI Processors


AI chip design is beginning to shift direction as more computing moves to the edge, adding a level of sophistication and functionality that typically was relegated to the cloud, but in a power envelope compatible with a battery. These changes leverage many existing tools, techniques and best practices for chip design. But they also are beginning to incorporate a variety of new approaches tha... » read more

Power-Hungry Safety And Security


There is a price to pay for everything. When it comes to adding safety and security into a device, the costs in terms of power and area can be significant, but if the task is taken seriously, those costs can be managed and minimized. New analysis and implementation tools are coming to market that can also help to keep the costs contained. But it also requires the right mindset. As more indus... » read more

A New Era In Flexible, Affordable Design


Socionext has always prided itself on flexibility. The company was formed in 2015 as part of the merger of the LSI businesses of Fujitsu and Panasonic. So not only did the company successfully merge engineering teams, it’s grown and expanded its offerings of advanced systems-on-chips (SoCs) over the years. As such, Socionext’s philosophy is rooted in doing more than just listening carefu... » read more

Blog Review: April 8


Synopsys' Taylor Armerding shares some tips for getting development, security, and operations teams communicating effectively and working toward a single purpose. Cadence's Paul McLellan looks back over computing history to how the best way to deliver computing resources has shifted from cloud to edge and back again. Mentor's Shivani Joshi shares an overview of flexible PCB designs and wh... » read more

Week In Review: Auto, Security, Pervasive Computing


Synopsys has added nanoscale and macroscale illumination optics to its RSoft Photonic Device Tools version 2020.03. ARVR designers can use the RSoft-LightTools Bidirectional Scattering Distribution Function (BSDF) interface to make interpolated BSDF files for optimized nanoscale and macroscale optics, such as freeform optical prism projectors, eye tracking technologies, and optical planar waveg... » read more

Blog Review: April 1


Rambus' Steven Woo takes an in-depth look at on-chip memory for high performance AI applications and explores some of the primary differences between HBM and GDDR6. Synopsys' Taylor Armerding warns of the risks of legacy vulnerabilities, where software has problems that were never fixed then forgotten about or never discovered in the first place, and key steps for finding and addressing them... » read more

Why It’s So Hard To Create New Processors


The introduction, and initial success, of the RISC-V processor ISA has reignited interest in the design of custom processors, but the industry is now grappling with how to verify them. The expertise and tools that were once in the market have been consolidated into the hands of the few companies that have been shipping processor chips or IP cores over the past 20 years. Verification of a pro... » read more

Blog Review: March 25


Rambus' Steven Woo checks out common memory systems that are used in the highest performance AI applications and points to the differences between on-chip memory, HBM, and GDDR. Mentor's Colin Walls considers whether software for embedded systems should be delivered as a binary library or source code and warns of some key potential issues when requesting source code. A Synopsys writer poi... » read more

Memory Issues For AI Edge Chips


Several companies are developing or ramping up AI chips for systems on the network edge, but vendors face a variety of challenges around process nodes and memory choices that can vary greatly from one application to the next. The network edge involves a class of products ranging from cars and drones to security cameras, smart speakers and even enterprise servers. All of these applications in... » read more

Week In Review: Design, Low Power


Silicon Labs will acquire Redpine Signals' Wi-Fi and Bluetooth business, development center in Hyderabad, India, and extensive patent portfolio for $308 million in cash. Silicon Labs says the acquisition will expand the company's IoT wireless technology, including smart phone and industrial IoT, and accelerate its roadmap for Wi-Fi 6. The deal is expected to close in the second quarter of 2020.... » read more

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