tag: analog

The Trouble With Models
By Ed Sperling - 20 Dec, 2017 - Comments: 0

Models are becoming more difficult to develop, integrate and utilize effectively at 10/7nm and beyond as design complexity, process variation and physical effects add to the number of variables that need to be taken into account. Modeling is a way of abstracting the complexity in various parts of the semiconductor design, and there can be dozens of models required for complex SoCs. Some are ... » read more

Noise At 7nm And Beyond
By Ed Sperling - 14 Dec, 2017 - Comments: 0

The digital and analog worlds always have been very different. Digital engineers see the world in terms of electrons and a well-defined set of numerical values. Their waves are discrete and squared off and their devices are often noisy when they turn on and off. Analog engineers think in terms of quiet, smooth waves, and they are very concerned about anything that can disrupt those waves, such ... » read more

Tech Talk: EM Crosstalk
By Ed Sperling - 14 Dec, 2017 - Comments: 0

Anand Raman, senior director at Helic, talks about the impact of electromagnetic interference on digital design at 10/7nm and beyond. Once confined to the analog space, noise is suddenly an issue at advanced nodes for all designs. At the root of the problem are smaller nodes, increased speed and higher levels of integration. https://youtu.be/hzZqK2lNJNQ » read more

Semiconductor Wafer Demand: Growing Pains
By Joanne Itow - 20 Nov, 2017 - Comments: 0

Semico Research is forecasting total semiconductor unit growth to exceed 13% this year, the first double-digit growth year since 2010. The exceptional unit growth is what the industry hopes for, but it does come with some growing pains. MOS logic, optoelectronics, MEMS and sensors, and even analog and discrete products are experiencing more than 10% unit growth in 2017. The challenge is that... » read more

New Drivers For I/O
By Brian Bailey - 13 Nov, 2017 - Comments: 0

Interface standards are on a tear, and new markets are pushing the standards in several directions at the same time. The result could be a lot more innovation and some updates in areas that looked to be well established. Traditionally, this has been a sleepy and predictable part of the industry with standards bodies producing updates to their interfaces at a reasonable rate. Getting data int... » read more

Mixed Messages For Mixed-Signal
By Brian Bailey - 09 Nov, 2017 - Comments: 1

There is no such thing as a purely digital design at advanced nodes today. Even designs that have no [getkc id="37" kc_name="analog"] content are likely relying on [getkc id="38" kc_name="mixed-signal"] components such as SerDes for communications, or voltage regulators for adaptive power control. But the days of purposely attempting to integrate everything including analog and RF onto a single... » read more

What’s Missing In Packaging
By Ed Sperling - 06 Nov, 2017 - Comments: 0

The growth of advanced packaging on the leading edge of design is inching backwards into older nodes. With most technology—tools, methodologies, materials and processes—this is business as usual. But in packaging, it's both counterintuitive and potentially problematic. The main reason that companies began investing in advanced packaging—OSATs, foundries, chipmakers such as Intel and Qu... » read more

Noise Abatement
By Brian Bailey - 12 Oct, 2017 - Comments: 0

[getkc id="285" kc_name="Noise"] is a fact of life. Almost everything we do creates noise as a by-product and quite often what is a signal to one party is noise to another. Noise cannot be eliminated. It must be managed. But is noise becoming a larger issue in chips as the technology nodes get smaller and packaging becomes more complex? For some, the answer is a very strong yes, while for ot... » read more

Fusing CMOS IC And MEMS Design For IoT Edge Devices
By Mentor, a Siemens Business - 04 Oct, 2017 - Comments: 0

Creating a sensor-based IoT edge device is challenging, due to the multiple design domains involved (Analog, digital, RF, and MEMS). But, creating an edge device that combines the electronics using the traditional CMOS IC flow and a MEMS sensor on the same silicon die can seem impossible. In fact, many IoT edge devices combine multiple dies in a single package, separating electronics from the M... » read more

Node Warfare?
By Mark LaPedus - 20 Sep, 2017 - Comments: 6

By Mark LaPedus & Ed Sperling GlobalFoundries uncorked a 12nm finFET process, which the company said will provide a 15% increase in density and more than 10% improvement in performance over the foundry's existing 14nm process. This is GlobalFoundries' second 12nm process. It announced a 12nm FD-SOI process called 12FDX last September, although it first mentioned a 12nm process back in J... » read more

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