Making Tradeoffs With AI/ML/DL


Machine learning, deep learning, and AI increasingly are being used in chip design, and they are being used to design chips that are optimized for ML/DL/AI. The challenge is understanding the tradeoffs on both sides, both of which are becoming increasingly complex and intertwined. On the design side, machine learning has been viewed as just another tool in the design team's toolbox. That's s... » read more

Rethinking Engineering Education In The U.S.


The CHIPS Act, as well as the ongoing need for talent, is causing both industry and academia in America to rethink engineering education, resulting in new approaches and stronger partnerships. As an example, Arizona State University (ASU) now has a Secure, Trusted, and Assured Microelectronics Center (STAM). The center offers an interdisciplinary approach to learning secure and trusted semic... » read more

High-Fidelity CFD Mesh Generation With Voronoi Diagram


We are attuned to the fact that the law of nature, or nature’s rule, drives various scientific phenomena. Humans often replicate naturally occurring phenomena to achieve a desirable outcome, similar to how scientists mimic photosynthesis to generate energy. Comparable is the case with Voronoi geometries. These geometries are widely seen in beehives, the structure of sponges, rock fragmentati... » read more

Blog Review: May 10


Synopsys' Alessandra Nardi and Uyen Tran explain how to meet quality, reliability, functional safety, and security requirements of automotive chips through thorough test programs, path-margin monitoring, and design failure mode and effect analysis (DFMEA). Cadence's Veena Parthan explores how computational fluid dynamics can help predict and model the generation, propagation, and mitigation ... » read more

Optimizing Scan Test For Complex ICs


As chips become more heterogeneous with more integrated functionality, testing them presents increasing challenges — particularly for high-speed system-on-chip (SoC) designs with limited test pin availability. In addition, the complexity of emerging packages like 3D and chiplets necessitates comprehensive new solutions that can provide faster results at multiple stages in the silicon lifec... » read more

Week In Review: Design, Low Power


Arm advanced its progress toward an initial public offering, confidentially submitting a draft registration statement on Form F-1 to the U.S. Securities and Exchange Commission. The size and price range for the proposed offering have yet to be determined. Graphene IDM Paragraf acquired Cardea Bio, a maker of graphene-based biocompatible chips. Cardea has developed a biosignal processing unit... » read more

ML Automotive Chip Design Takes Off


Machine learning is increasingly being deployed across a wide swath of chips and electronics in automobiles, both for improving reliability of standard parts and for the creation of extremely complex AI chips used in increasingly autonomous applications. On the design side, the majority of EDA tools today rely on reinforcement learning, a machine learning subset of AI that teaches a machine ... » read more

Role Of IoT Software Expanding


IoT software is becoming much more sophisticated and complex as vendors seek to optimize it for specific applications, and far more essential for vendors looking to deliver devices on-time and on-budget across multiple market segments. That complexity varies widely across the IoT. For example, the sensor monitoring for a simple sprinkler system is far different than the preventive maintenanc... » read more

The Automotive Electric Vehicle Transition


The only really interesting part of the automotive industry is the electric vehicle (EV) segment. These vehicles are also called NEVs in China for "new energy vehicles". The reason that I say this is the only interesting segment is because it is clear that the whole world is moving fast to EVs and internal combustion engines (ICEs) will decline. One challenge for traditional automotive manufact... » read more

Blog Review: May 3


Synopsys' Thomas Andersen considers the requirements of AI-optimized chips that are resulting in exploration of different memory configurations, different types of memory, and different types of processor technologies and software components. Cadence's Girish Vaidyanathan considers the role of hierarchy and partitioning in custom design and looks at how a virtual hierarchy allows layout desi... » read more

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