tag: lithography

ASD process that was performed in situ on the etch chamber
By Technical Paper Link - 06 May, 2022 - Comments: 0

New research paper entitled "Plasma-based area selective deposition for extreme ultraviolet resist defectivity reduction and process window improvement" from TEL Technology Center, Americas and IBM Research. Abstract: "Extreme ultraviolet (EUV) lithography has overcome significant challenges to become an essential enabler to the logic scaling roadmap. However, it remains limited by stocha... » read more

Review of essential use of fluorochemicals in lithographic patterning and semiconductor processing
By Technical Paper Link - 06 Apr, 2022 - Comments: 0

New academic paper by researchers from Cornell University.   Abstract "We identify and describe categories of fluorochemicals used to produce advanced semiconductors within the lithographic patterning manufacturing processes. Topics discussed include the per- and polyfluoroalkyl substance (PFAS) materials used and their necessary attributes for successful semiconductor manufacturing... » read more

Unsolved Issues In Next-Gen Photomasks
By Mark LaPedus - 17 Feb, 2022 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss optical and EUV photomasks issues, as well as the challenges facing the mask business, with Naoya Hayashi, research fellow at DNP; Peter Buck, director of MPC & mask defect management at Siemens Digital Industries Software; Bryan Kasprowicz, senior director of technical strategy at Hoya; and Aki Fujimura, CEO of D2S. What f... » read more

Photomask Challenges At 3nm And Beyond
By Mark LaPedus - 25 Jan, 2022 - Comments: 1

Experts at the Table: Semiconductor Engineering sat down to discuss optical and EUV photomasks issues, as well as the challenges facing the mask business, with Naoya Hayashi, research fellow at DNP; Peter Buck, director of MPC & mask defect management at Siemens Digital Industries Software; Bryan Kasprowicz, senior director of technical strategy at Hoya; and Aki Fujimura, CEO of D2S. What f... » read more

200mm Shortages May Persist For Years
By Mark LaPedus - 20 Jan, 2022 - Comments: 2

A surge in demand for chips at more mature process nodes is causing shortages for both 200mm foundry capacity and 200mm equipment, and it shows no signs of letting up. In fact, even with new capacity coming on line this year, shortages are likely to persist for years, driving up prices and forcing significant changes across the semiconductor supply chain. Shortages for both 200mm foundry cap... » read more

Business, Technology Challenges Increase For Photomasks
By Mark LaPedus - 16 Dec, 2021 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss optical and EUV photomasks issues, as well as the challenges facing the mask business, with Naoya Hayashi, research fellow at DNP; Peter Buck, director of MPC & mask defect management at Siemens Digital Industries Software; Bryan Kasprowicz, senior director of technical strategy at Hoya; and Aki Fujimura, CEO of D2S. What f... » read more

International Roadmap for Devices and Systems lithography roadmap
By Technical Paper Link - 19 Nov, 2021 - Comments: 0

Abstract: "Background: Planned improvements in semiconductor chip performance have historically driven improvements in lithography and this is expected to continue in the future. The International Roadmap for Devices and Systems roadmap helps the industry plan for the future. Aim: The 2021 lithography roadmap shows requirements, possible options, and challenges for the next 15 years. Resul... » read more

Gearing Up For High-NA EUV
By Mark LaPedus - 21 Oct, 2021 - Comments: 2

The semiconductor industry is moving full speed ahead to develop high-NA EUV, but bringing up this next generation lithography system and the associated infrastructure remains a monumental and expensive task. ASML has been developing its high-numerical aperture (high-NA) EUV lithography line for some time. Basically, high-NA EUV scanners are the follow-on to today’s EUV lithography systems... » read more

Stacked Nanosheets And Forksheet FETs
By Katherine Derbyshire - 19 Aug, 2021 - Comments: 0

What comes next after gate-all-around FETs is still being worked out, but it likely will involve some version of stacked nanosheets. The design of advanced transistors is a tradeoff. On one hand, it takes less gate capacitance to control a thin channel. On the other hand, thin channels can’t carry as much drive current. Stacked nanosheet designs seek to reconcile these two objectives by... » read more

Tailoring spatial entropy in EUV focused beams for multispectral ptychography
By Technical Paper Link - 27 Jul, 2021 - Comments: 0

The Advanced Research Center for Nanolithography (ARCNL) and Vrije Universiteit Amsterdam have developed a new class of diffractive optical elements that paves the way towards more widespread use of EUV microscopy. Abstract "Diffractive optics can be used to accurately control optical wavefronts, even in situations where refractive components such as lenses are not available. For instance, c... » read more

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