Using AI To Close Coverage Gaps


Verification of complex, heterogeneous chips is becoming much more difficult and time-consuming. There are more corner cases, and devices have to last longer and behave according to spec throughout their lifetimes. This is where AI fits in. It can help identify redundancy and provide information about why a particular device or block may not be able to be fully covered, and it can do it in less... » read more

Blog Review: July 26


Siemens' Chris Spear shows how to make a group of specialized classes in SystemVerilog. Synopsys' Guy Cortez and Randy Fish consider what a silicon lifecycle management strategy looks like for SoCs deployed in HPC and data center environments. Cadence's Veena Parthan provides a primer on writing Python scripts for Fidelity, including API descriptions and different sets of packages to acce... » read more

Week In Review: Auto, Security, Pervasive Computing


The Biden-Harris Administration announced the U.S. Cyber Trust Mark, a cybersecurity certification and labeling program to help consumers choose smart devices less vulnerable to cyberattacks. The Federal Communications Commission (FCC) is applying to register the Cyber Trust Mark with the U.S. Patent and Trademark Office and it would appear on qualifying smart products, including refrigerators,... » read more

Week In Review: Semiconductor Manufacturing, Test


TSMC is delaying construction on its $40 billion fab in Arizona due to a shortage of U.S. semiconductor workers and higher-than-expected expenses, Bloomberg reported. The Semiconductor Industry Association (SIA) urged the U.S. government to refrain from further restrictions on semiconductor technology to China “until it engages more extensively with industry and experts to assess the impac... » read more

Week In Review: Design, Low Power


Cadence will acquire Rambus' SerDes and memory interface PHY IP business. Rambus will retain its digital IP business, including memory and interface controllers and security IP. “With this transaction, we will increase our focus on market-leading digital IP and chips and expand our roadmap of novel memory solutions to support the continued evolution of the data center and AI,” said Sean Fan... » read more

Evolution Of Equalization Techniques In High-Speed SerDes For Extended Reaches


The relentless demand for massive amounts of data is accelerating the pace of high-performance computing (HPC) within the high-speed Ethernet realm. This escalation, in turn, intensified the complexity associated with designing networking SoCs, including switches, NICs, retimers, and pluggable modules. Such growth is accelerating the demand for bandwidth hungry applications to transition from 4... » read more

Improving Performance And Lowering Power In Automotive


Automotive OEMs are boosting their investments across the semiconductor ecosystem as stepping stones toward electrification and autonomy, and they are starting to encounter some of the same issues chipmakers have been wrestling with at advanced nodes — massive compute performance, thermal and power issues, reliability over extended lifetimes, and a highly diverse and geographically distribute... » read more

Getting Rid Of Heat In Chips


Power consumed by semiconductors creates heat, which must be removed from the device, but how to do this efficiently is a growing challenge. Heat is the waste product of semiconductors. It is produced when power is dissipated in devices and along wires. Power is consumed when devices switch, meaning that it is dependent upon activity, and that power is constantly being wasted by imperfect de... » read more

HBM’s Future: Necessary But Expensive


High-bandwidth memory (HBM) is becoming the memory of choice for hyperscalers, but there are still questions about its ultimate fate in the mainstream marketplace. While it’s well-established in data centers, with usage growing due to the demands of AI/ML, wider adoption is inhibited by drawbacks inherent in its basic design. On the one hand, HBM offers a compact 2.5D form factor that enables... » read more

Blog Review: July 19


Siemens' Keith Felton argues that co-design-driven semiconductor package planning and prototyping is critical for design success and points to how interchange formats enable designers to make trade-off decisions for both the package and the board and communicate those recommendations back to the other design team in formats that are native to their tools. Cadence's Xin Mu explains precoding ... » read more

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