tag: AI

How To Maximize Your Competitiveness In The Semiconductor Industry Using Advanced DFT
By Siemens EDA - 07 Sep, 2021 - Comments: 1

Embarking on advanced SoCs without a smart design-for-test (DFT) strategy can be harmful to your bottom line. Being competitive in today’s semiconductor market means adopting integrated, scalable, and flexible solutions to cut DFT implementation time, test costs, and time-to-market. Tessent DFT technologies, developed in partnership with industry leaders, provide the most advanced DFT and yie... » read more

Fabs Drive Deeper Into Machine Learning
By Anne Meixner - 07 Sep, 2021 - Comments: 0

Advanced machine learning is beginning to make inroads into yield enhancement methodology as fabs and equipment makers seek to identify defectivity patterns in wafer images with greater accuracy and speed. Each month a wafer fabrication factory produces tens of millions of wafer-level images from inspection, metrology, and test. Engineers must analyze that data to improve yield and to reject... » read more

How Dynamic Hardware Efficiently Solves The Neural Network Complexity Problem
By Sam Fuller - 02 Sep, 2021 - Comments: 0

Given the high computational requirements of neural network models, efficient execution is paramount. When performed trillions of times per second even the tiniest inefficiencies are multiplied into large inefficiencies at the chip and system level. Because AI models continue to expand in complexity and size as they are asked to become more human-like in their (artificial) intelligence, it is c... » read more

Why TinyML Is Such A Big Deal
By Bryon Moyer - 02 Sep, 2021 - Comments: 1

While machine-learning (ML) development activity most visibly focuses on high-power solutions in the cloud or medium-powered solutions at the edge, there is another collection of activity aimed at implementing machine learning on severely resource-constrained systems. Known as TinyML, it’s both a concept and an organization — and it has acquired significant momentum over the last year or... » read more

Stepping Up To Greater Security
By Neeraj Paliwal - 02 Sep, 2021 - Comments: 0

The stakes for security grow with each passing day. The value of our data, our devices, and our network infrastructure continually increases as does our dependence on these vital resources. Reports appear weekly, and often daily, that describe security vulnerabilities in deployments. There is a steady drumbeat of successful attacks on systems that were assumed to be protecting infrastructure, i... » read more

New Approaches For Processor Architectures
By Ed Sperling - 26 Aug, 2021 - Comments: 0

Processor vendors are starting to emphasize microarchitectural improvements and data movement over process node scaling, setting the stage for much bigger performance gains in devices that narrowly target what end users are trying to accomplish. The changes are a recognition that domain specificity, and the ability to adjust or adapt designs to unique workloads, are now the best way to impro... » read more

Power/Performance Bits: Aug. 24
By Jesse Allen - 24 Aug, 2021 - Comments: 0

Low power AI Engineers at the Swiss Center for Electronics and Microtechnology (CSEM) designed an SoC for edge AI applications that can run on solar power or a small battery. The SoC consists of an ASIC chip with RISC-V processor developed at CSEM along with two tightly coupled machine-learning accelerators: one for face detection, for example, and one for classification. The first is a bin... » read more

GDDR6 Memory On The Leading Edge
By Frank Ferro - 12 Aug, 2021 - Comments: 0

With the accelerating growth in data traffic, it is unsurprising that the number of hyperscale data centers keeps rocketing skyward. According to analysts at the Synergy Research Group, in nine months (Q2’20 to Q1’21), 84 new hyperscale data centers came online bringing the total worldwide to 625. Hyperscaler capex set a record $150B over the last four quarters eclipsing the $121B spent in ... » read more

Harness System-Level Data To Optimize Many-Core AI And ML Chips
By Siemens EDA - 10 Aug, 2021 - Comments: 0

The novel multicore architectures of SoCs for machine learning (ML) and artificial intelligence (AI) applications are expected to deliver huge improvements in power efficiency. However, chip development teams and the customers for their devices face the growing complexity of hardware-software co-optimization, validation, and debug. In short, these SoCs are increasingly difficult to validate and... » read more

Better Optimization For Many-Core AI Chips
By Richard Oxland - 10 Aug, 2021 - Comments: 0

The rise of massively parallel computing has led to an explosion of silicon complexity, driven by the need to process data for artificial intelligence (AI) and machine learning (ML) applications. This complexity is seen in designs like the Cerebras Wafer Scale Engine (figure 1), a tiled manycore, multiple wafer die with a transistor count into the trillions and nearly a million compute cores. ... » read more

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