tag: ALD

Dealing With Atoms
By Mark LaPedus - 13 Jul, 2015 - Comments: 0

Chipmakers are ramping up a new range of device architectures, such as 3D NAND and finFETs. But to enable current and future devices, IC vendors will require new breakthroughs, including tools that can process tiny structures and films, even at the atomic level. The problem? There are gaps in terms of techniques that can process chips at the atomic level. Looking to help fill part of the ... » read more

New Patterning Paradigm?
By Mark LaPedus - 16 Apr, 2015 - Comments: 0

Chip scaling is becoming more difficult at each process node, but the industry continues to find new and innovative ways to solve the problems at every turn. And so chipmakers continue to march down the various process nodes. But the question is for how much longer? In fact, at 16nm/14nm and beyond, chipmakers are finding new and different challenges, which, in turn, could slow IC scaling or br... » read more

Issues And Options At 5nm
By Mark LaPedus - 19 Mar, 2015 - Comments: 0

While the foundries are ramping up their processes for the 16nm/14nm node, vendors are also busy developing technologies for 10nm and beyond. In fact, chipmakers are finalizing their 10nm process offerings, but they are still weighing the technology options for 7nm. And if that isn’t enough, IC makers are beginning to look at the options at 5nm and beyond. Today, chipmakers can see a p... » read more

More Lithography Options?
By Mark LaPedus - 03 Mar, 2015 - Comments: 1

Lithographers face some tough decisions at 10nm and beyond. At these nodes, IC makers are still weighing the various patterning options. And to make it even more difficult, lithographers could soon have some new, and potentially disruptive, options on the table. On one front, the traditional next-generation lithography (NGL) technologies are finally making some noticeable progress. For examp... » read more

Atomic Layer Etch Finally Emerges
By Mark LaPedus - 15 May, 2014 - Comments: 1

The migration towards finFETs and other devices at the 20nm node and beyond will require a new array of chip-manufacturing technologies. Multiple patterning, hybrid metrology and newfangled interconnect schemes are just a few of the technologies required for future scaling. In addition, the industry also will require new techniques that can process structures at the atomic level. For example... » read more

New Challenges For Post-Silicon Channel Materials
By Katherine Derbyshire - 21 Feb, 2014 - Comments: 1

In order to bring alternative channel materials into the CMOS mainstream, manufacturers need not just individual transistor devices, but fully manufacturable process flows. Work presented at the recent IEEE Electron Device Meeting (Washington, D.C., Dec. 9-11, 2013) showed that substantial work remains to be done on almost all aspects of such a flow. First and most fundamentally, it is diffi... » read more

Interconnect Challenges Grow
By Mark LaPedus - 20 Feb, 2014 - Comments: 0

Qualcomm outlined the technology challenges facing mobile chip suppliers at a recent event. In no particular order, the challenges include the usual suspects—area scaling, power reduction, performance and cost. Another concern for Qualcomm is an often-overlooked part of the equation—the backend-of-the-line (BEOL). In chip production, the BEOL is where the interconnects are formed within ... » read more

The List Of Unknowns Grows After Silicon
By Katherine Derbyshire - 07 Feb, 2014 - Comments: 3

As discussed earlier in this series, most proposed alternative channel schemes depend on germanium channels for pMOS transistors, and InGaAs channels for nMOS transistors. Of the two materials, InGaAs poses by far the more difficult integration challenges. Germanium has been present in advanced silicon CMOS fabs for several technology generations, having been introduced used in strained silicon... » read more

Manufacturing Bits: July 16
By Mark LaPedus - 16 Jul, 2013 - Comments: 0

Photon Chips Harvard University, the Massachusetts Institute of Technology (MIT) and the Vienna University of Technology have devised an all-optical transistor controlled by a single photon. The optical transistor could enable the development of photonic quantum gates and deterministic multi-photon entanglement. For years, researchers have been looking to develop an optical transistor, whe... » read more

Getting Ready For High-Mobility FinFETs
By Mark LaPedus - 21 Feb, 2013 - Comments: 0

By Mark LaPedus The IC industry entered the finFET era in 2011, when Intel leapfrogged the competition and rolled out the newfangled transistor technology at the 22nm node. Intel hopes to ramp up its second-generation finFET devices at 14nm by year’s end, with plans to debut its 11nm technology by 2015. Hoping to close the gap with Intel, silicon foundries are accelerating their efforts t... » read more

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