Week In Review: Auto, Security, Pervasive Computing


Automotive, mobility Fraunhofer IIS has opened a five-kilometer (3.11-mile) 5G test bed for automotive 5G applications near the city of Rosenheim in Bavaria, Germany. A closed 5G network with multiple base stations covers the test track, where connected cars can be tested under real conditions. “The automotive test bed is designed specially for developers and users that want to test new conn... » read more

Zero Dark Silicon


Planning for AI requires an understanding of how much data needs to be processed and how quickly that needs to happen. Nick Ni, senior director of data center AI and compute markets at AMD, talks with Semiconductor Engineering about data bubbles and domain-specific designs, why dark silicon is no longer as useful as in the past, and how to optimize power and performance in both the data center ... » read more

Week In Review: Manufacturing, Test


Acquisitions & Investments California-based MaxLinear plans to acquire Taiwan-based Silicon Motion (SMI), in a cash and stock deal valued at about $3.8 billion. Silicon Motion’s NAND flash controller technology for solid state storage devices, will extend MaxLinear’s RF, analog, and mixed signal portfolio. ISMC will invest about $3 billion in a semiconductor plant in India’s south... » read more

Week In Review: Design, Low Power


Rambus will acquire Hardent, a provider of design services and IP. Rambus said Hardent's silicon design, verification, compression, and Error Correction Code (ECC) expertise will provide key resources for the Rambus CXL Memory Interconnect Initiative. “Driven by the demands of advanced workloads like AI/ML and the move to disaggregated data center architectures, industry momentum for CXL-base... » read more

Diagnostic Medical Ultrasound Innovation Using UltraFast Algorithms


Medical ultrasound is the most attractive among all diagnostic imaging systems due to its least-invasive nature and lack of any radiation. As medical ultrasound continues to grow in wider range of applications for its non-invasive nature and for its ability to see soft-tissue images, there is growing demand in supporting advanced imaging techniques in ultrasound beamformers, in multi-dimensiona... » read more

System-Level Benefits Of The Versal Platform


Moore's Law has fueled the technological prosperity of the last 50 years, but it is generally believed now that Gordon Moore's 1965 forecast about the pace of innovation no longer holds true today. Continuing the silicon architectures of yesterday cannot meet the expanding demands of tomorrow's workloads. Frequently highlighted by today’s leaders in the field of computer architecture [Ref 1],... » read more

Choosing Which Tasks To Optimize In Chips


The optimization of one or more tasks is an important aspect of every SoC created, but with so many options now on the table it is often unclear which is best. Just a few years ago, most people were happy to buy processors from the likes of Intel, AMD and Nvidia, and IP cores from Arm. Some even wanted the extensibility that came from IP cores like Tensilica and ARC. Then, in 2018, John Henn... » read more

Chip Industry Heads Toward $1T


The chip industry is on track to hit $1 trillion sometime over the next decade, and while the exact timing depends on a variety of factors, the trend line appears to be stable. The digitization of data, the digitalization of technology, and the expansion into new and existing markets, collectively are expected to drive chip industry growth for years to come. Exactly when the IC world will to... » read more

Paving The Way To Chiplets


The packaging industry is putting pieces in place to broaden the adoption of chiplets beyond just a few chip vendors, setting the stage for next-generation 3D chip designs and packages. New chiplet standards, and a cost analysis tool for determining the feasibility of a given chiplet-based design, are two new and important pieces. Along with other efforts, the goal is to propel the chiplet m... » read more

Week In Review: Design, Low Power


Tools & IP Synopsys unveiled a new neural processing unit (NPU) IP and toolchain. DesignWare ARC NPX6 NPU IP scales from 4K to 96K MACs with power efficiency of 30 TOPS/Watt. A single instance offers 250 TOPS at 1.3 GHz on 5nm processes in worst-case conditions, or up to 440 TOPS by using new sparsity features, which can increase the performance and decrease energy demands of executing a n... » read more

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