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Week In Review: Design, Low Power

New RISC-V specifications; quantum security for RISC-V; physical design; rigid-flex; integrated BLE; PCIe 7.0 preview.

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RISC-V

RISC-V International announced four new specification and extension approvals. Efficient Trace for RISC-V defines an approach to processor tracing that uses a branch trace. RISC-V Supervisor Binary Interface architects a firmware layer between the hardware platform and the operating system kernel using an application binary interface in supervisor mode to enable common platform services across all RISC-V operating system implementations. RISC-V Unified Extensible Firmware Interface (UEFI) specifications bring existing UEFI standards onto RISC-V platforms. RISC-V Zmmul multiply-only extension enables low-cost implementations that require multiplication operations but not division, and is part of the RISC-V Unprivileged Specification.

Codasip’s RISC-V processors can now deploy quantum-resistant secure tools from Veridify Security to support a secure-boot function. Veridify’s secure algorithm validates firmware as it loads onto the Codasip processor and can enable additional security features like secure firmware updates, authentication, and data protection. Veridify’s methods are suitable for processors in long-life embedded applications such as remote monitoring systems, surveillance cameras, and smart meters. In addition, the Codasip Studio platform now supports Apple macOS Monterey.

OpenHW Group unveiled an open-source RISC-V Development Kit featuring the OpenHW CORE-V MCU, the CORE-V software developer kit (SDK) with full-featured Eclipse IDE, and an open PCB design that supports Amazon Web Services via AWS IoT ExpressLink. The CORE-V MCU is based on the open-source CV32E40P embedded-class processor, a small, efficient, 32-bit, in-order open-source RISC-V core with a four-stage pipeline that implements the RV32IM[F]C RISC-V instruction extensions.

Imagination Technologies debuted a real-time embedded RISC-V CPU. The scalable 32-bit real-time embedded core features up to 128KB of tightly coupled memories (both instruction and data) for deterministic response and Level 1 cache sizes of up to 128KB for robust performance. The new CPU offers a range of floating-point formats including single-precision and bfloat16. It targets a range of applications including networking solutions, packet management, storage controllers, and sensor management for AI cameras and smart metering.

SiFive updated its X280 processor, introducing new features including scalability up to a 16-core cache-coherent complex, WorldGuard trusted protection, and a new interface allowing for integration between the X280 vector unit and customer-designed external AI accelerators or other coprocessors.

Tools & IP

Synopsys completed the acquisition of WhiteHat Security from NTT Security Corporation, a $330 million cash deal. WhiteHat Security provides application security software, including dynamic application security testing (DAST) technology, using a SaaS model. “WhiteHat Security helped pioneer SaaS delivery of application security testing and brings powerful technology and expertise into our application security portfolio,” said Jason Schmitt, general manager of the Synopsys Software Integrity Group. “WhiteHat Security’s DAST capabilities complement our strengths in static analysis, interactive analysis and software composition analysis, while their expertise in SaaS will accelerate our security testing SaaS capabilities.”Cadence’s PHY and Controller IP for the PCIe 5.0 specification in the TSMC N7, N6 and N5 process technologies passed certification tests from PCI-SIG, operating at the full speed of 32GT/s.

Siemens Digital Industries Software updated its NX product engineering solution, adding a workflow for rigid and rigid-flex PCB designs. It also adds improved collaboration and reuse features, updates to curve creation and editing, and part optimization within the context of an assembly that considers design and manufacturing constraints.

Tortuga Logic changed its name to Cycuity. It also raised a fresh round of funding from Dorilton Ventures, Eclipse Ventures, and others that brought its total funding to $12 million. “The security of hardware is a growing concern for the world’s largest semiconductor companies and their major customers, from the beginning of the microelectronic design cycle, through the verification process and into the wider supply chain,” said Daniel Freeman, General Partner at Dorilton Ventures. “Assurance has been severely disrupted by silicon shortages and other vulnerabilities in recent years. Cycuity is already making great strides in helping the microelectronic industry meet these challenges: systematically mitigating existing weaknesses in the cycle, identifying new ones, and providing quantifiable assurance.”

Azcom Technology selected Keysight Open Radio Architect (KORA) solutions to validate performance and compliance of O-RAN Radio and Distributed Units (O-RU and O-DU) implementation to specifications set by the O-RAN Alliance, as well as to verify interoperability between network elements. Azcom also uses the KORA test tools to perform O-RAN pre-certification and badging testing. Keysight’s 5G test solutions were also adopted by the World Standardization Certification & Testing Group (WSCT), a third-party test house based in Shenzhen, China, to speed regulatory, performance and positioning validation of 5G devices to be launched in domestic and global markets.

Pulsic updated its physical design tool for custom-digital designs, adding the ability to handle incremental floorplans for integration of hard IP blocks, automation of advanced custom cell placement, and automation of custom routing. It also adds embedded integrations with Cadence Virtuoso and Synopsys Custom Compiler.

Cadence’s PHY and Controller IP for the PCIe 5.0 specification in the TSMC N7, N6 and N5 process technologies passed certification tests from PCI-SIG, operating at the full speed of 32GT/s.

Mirabilis Design uncorked a new tool for simulation of RF and antenna systems, enabling evaluation of the feasibility of a new antenna design, selection of the right antenna configuration for an application, and comparison of antennas from different suppliers based on datasheets.

Brite Semiconductor launched a high-precision 16-bit SAR ADC. It targets industrial-grade high-precision applications such as industrial control, energy, and AIoT.

PCI-SIG announced the PCIe 7.0 specification, doubling the raw data rate of PCIe 6.0 to 128 GT/s and up to 512 GB/s bi-directionally via x16 configuration. It will use PAM4 signaling and focus on channel parameters and reach. The specification is targeted for release to members in 2025.

Chips & boards

Renesas Electronics debuted a new family of Bluetooth Low Energy SoCs that integrate a power management unit, a hardware voice activity detector (VAD), GPU, and Bluetooth LE connectivity. It uses an Arm Cortex-M33 processor as the main application core and Cortex -M0+ as the sensor node controller and targets IoT devices, wearables, consumer medical devices, home appliances, and industrial automation.

AMD introduced its second generation of mid-range SoC processors optimized for industrial and robotics systems, machine vision, IoT, and thin-client equipment. Compared to its predecessor, the line doubles core counts and improves performance-per-watt. Embedded R2000 Series processors are scalable up to four “Zen+” CPU cores with eight threads, 2MB of L2 cache and 4MB of shared L3 cache.

Infineon Technologies introduced new fully programmable motor controllers combining 3-phase gate driver IC features with an additional MCU that has peripherals and specifications optimized for motor control and drives. It targets applications such as cordless power tools, gardening products, drones, e-bikes, and automated guided vehicles.

MediaTek added a new SoC for high-performance 5G smartphones. The Dimensity 9000+ SoC integrates Arm’s v9 CPU architecture with a 4nm octa-core process, combining one ultra-Cortex-X2 core operating at up to 3.2GHz with three super Cortex-A710 cores and four efficiency Cortex-A510 cores, as well as an Arm Mali-G710 MC10 graphics processor.

Renesas added a sensor signal conditioning (SSC) IC for accurate amplification, digitization, and sensor-specific correction of sensor signals in high-end applications including industrial, medical and consumer sensing. It includes a two-channel analog front end as well as an integrated ARM-based MCU with embedded mathematics for sensor signal processing.

Microchip Technology uncorked the AVR-IoT Cellular Mini Development Board based on an 8-bit MCU as a platform to start building sensor and actuator nodes on 5G narrowband IoT networks.

Memory

STMicroelectronics debuted Serial Page EEPROM, a high-density, page-erasable SPI memory with ultra-low power consumption. Starting with a 32Mbit version, the family will expand to 16Mbit and 8Mbit density options. It targets applications such as industrial IoT modules, wearables, healthcare, medical, electronic shelf-edge labelling, smart meters, and 5G optical-fiber modules.

CFX released anti-fuse OTP technology on a 90nm BCD process. Its anti-fuse technology uses the thin gate oxide of advanced CMOS logic processes as the dielectric and allows the integration of all programming circuitry in the same OTP block.

Micron uncorked a 1.5 TB microSD card using 176-layer 3D NAND. It targets industrial video security camera applications, particularly those that want to limit uploading to cloud.

Quantum & HPC

Silicon Quantum Computing (SQC) debuted a quantum integrated circuit manufactured at the atomic scale which it says enables modeling of small molecules. “Today’s classical computers struggle to simulate even relatively small molecules due to the large number of possible interactions between atoms. Development of SQC’s atomic-scale circuit technology will allow the company and its customers to construct quantum models for a range of new materials, whether they be pharmaceuticals, materials for batteries, or catalysts. It won’t be long before we can start to realize new materials that have never existed before,” said SQC founder Michelle Simmons.

Amazon established the AWS Center for Quantum Networking, which aims to address fundamental scientific and engineering challenges in the development of quantum networks, including developing new hardware, software, and applications, including quantum repeaters and transducers.

The University of Queensland is getting a new supercomputer. Called Bunya, it will be provided by Dell Technologies and include ~6000 AMD EPYC Milan series cores with 96 physical cores per node. While it will start out as a traditional CPU-based system, upgrades will likely add different node types, such as high-performance accelerators, including GPUs. The new supercomputer will replace three of the university’s older HPCs and is expected to be operational in July.

People

Michelle Clancy, president and CEO of Cayenne Global, was selected as the 2022 recipient of the Marie R. Pistilli Women in Electronic Design Award for her work in marketing and communications throughout the EDA and semiconductor industries. Clancy has also worked as a volunteer for over 20 years to promote, expand, evolve, and improve DAC.

Read more

Find more of the week’s news at Manufacturing, Test and Auto, Security, Pervasive Computing.

The burden for ensuring IC reliability is shifting left, in the latest Systems & Design newsletter. Other stories highlight why getting hardware-dependent software right is critical and how the talent crunch is driving EDA to embrace big data.

Find out if analog can make a comeback in the latest Low Power-High Performance newsletter. Plus, read why thermal issues in DRAM are reaching a crisis point and whether the IP industry is ready to undergo a transformation.



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