tag: analog

Test Challenges Rising For Mobile Devices
By Mark LaPedus - 20 Mar, 2014 - Comments: 0

Smartphone and tablets continue to advance at a dizzying pace. On the component side alone, the latest mobile devices are moving towards 64-bit application processors, multi-mode RF front-ends, higher-end cameras and flashy LCD screens. Some systems even boast fingerprint scanners and heart rate sensors. But an obvious part of the system continues to lag behind the curve—battery life. In r... » read more

Five Key Challenges In Designing With High-Speed Analog IP
By Various Writers - 12 Mar, 2014 - Comments: 0

There’s good reason why analog IC design is often considered to be more of an art than a science. Compared to their digital counterparts, analog components are much more sensitive to noise, distortion, and other errors. This white paper is filled with tips on meeting these challenges and speeding up your design cycle. To download this paper, click here. » read more

Does It Take A Catastrophe?
By Linda Prowse Fosler - 20 Feb, 2014 - Comments: 0

What makes a company search for new verification methods and tools? Sometimes organizations change, proactively, because they are wise and want to avoid problems; but sadly, more often it is a catastrophe that forces change. This was the case with a large U.S. supplier of safety-critical and high-reliability ICs. After a failed chip, it finally moved from simply verifying the analog and digi... » read more

Manufacturing Bits: Jan. 28
By Mark LaPedus - 28 Jan, 2014 - Comments: 0

Spintronics gains traction The field of spintronics is gaining interest. The technology could enable a new class of spin-based devices, which combine the switching speeds of logic and the non-volatility of memory. Controlling the magnetism by means of electric fields is the key for future devices, but the ability to switch ferromagnetism technology at room temperature is challenging. Helmho... » read more

Blog Review: Jan. 15
By Ed Sperling - 15 Jan, 2014 - Comments: 0

Mentor’s Colin Walls digs into safety-critical sensors for cars, which are essential to the operation of a variety of systems in vehicles. The number of redundant sensors increases proportionate to the risk from failure, something that has been an accepted practice in mil/aero markets for years. Cadence’s Brian Fuller gazes into a crystal ball and concludes that while the semiconductor i... » read more

Analog IP Migration Using Design Knowledge Extraction
By Various Writers - 07 Nov, 2013 - Comments: 0

Demonstrated in this paper is a technique for automatic circuit resizing between different technologies. It relies on design knowledge extraction, which renders it very fast compared to full optimization approaches and allows handling of much larger circuits. This technique studies the original design and extracts its major features (basic devices & blocks features, device matching, parasitics,... » read more

Experts At The Table: Who Takes Responsibility?
By Ed Sperling - 04 Oct, 2013 - Comments: 0

By Ed Sperling Semiconductor Engineering sat down with John Koeter, vice president of marketing and AEs for IP and systems at Synopsys; Mike Stellfox, technical leader of the verification solutions architecture team at Cadence; Laurent Moll, CTO at Arteris; Gino Skulick, vice president and general manager of the SDMS business unit at eSilicon; Mike Gianfagna, vice president of corporate market... » read more

Over 65% Smartphone RF Switches SOI, Says Yole; Power Amps Next
By Various Writers - 14 Aug, 2013 - Comments: 0

By Adele Hars The industry research firm Yole Développement says that more than 65 percent of substrates used in fabricating switches for handsets are SOI-based. This is a high-growth part of the market, putting up double-digit increases. Like a standard SOI wafer, an RF SOI substrate has an active (“top”) layer on which CMOS transistors are built, with an isolating (“BOx”) ... » read more

Foundries Eye 300mm Analog Fabs
By Mark LaPedus - 18 Jul, 2013 - Comments: 0

By Mark LaPedus In 2009, Texas Instruments changed the semiconductor landscape when it opened the industry’s first 300mm fab for analog chips. Until then, analog chip production was conducted in fabs at 200mm wafer sizes and below. With a 300mm fab, TI potentially could gain a die-size and cost advantage over its analog rivals. On paper, a 300mm wafer provides 2.5 times more chips than a... » read more

VLSI Kyoto – The SOI Papers
By Various Writers - 19 Jun, 2013 - Comments: 0

By Adele Hars There were some breakthrough FD-SOI and other excellent SOI-based papers that came out of the 2013 Symposia on VLSI Technology and Circuits in Kyoto (June 10-14, 2013). By way of explanation, VSLI comprises two symposia: one on Technology; one on Circuits. However, papers that are relevant to both were presented in “Jumbo Joint Focus” sessions.  The papers should all b... » read more

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