Week In Review: Design, Low Power


DAC and SEMICON WEST rebounded this year, focusing on everything from security to chiplets and smart manufacturing. Panel at DAC conference: Left to right, ARM’s Brian Fuller (moderator), Joe Costello (Metrics, Kwikbit, Arrikto, Acromove), and Wally Rhines (Cornami). Source: Semiconductor Engineering/Ann Mutschler EDA and IP remain strong, approaching $4 billion in Q1, according to ... » read more

Week In Review: Semiconductor Manufacturing, Test


Restrictions on China continue to grow. The Biden Administration is considering more restrictions on selling advanced AI chips to China, according to multiple media reports. Meanwhile, the Dutch government is expected to limit the sale of manufacturing equipment. JIC Capital, the wholly owned subsidiary of Japan Investment Corporation (JIC), will purchase materials company JSR Corp. through ... » read more

Week In Review: Design, Low Power


Keysight Technologies said it intends to acquire ESI Group for €913 million (~$998.6 million). ESI Group provides virtual prototyping solutions for the automotive and aerospace end markets that can create real-time digital twins to simulate a product's behavior during testing and real-life use. MLCommons announced the latest results from two MLPerf benchmark suites. One aims to measure the... » read more

Challenges Grow For Data Management And Sharing In EDA


Semiconductor Engineering sat down to talk about more openness in EDA data, how increased complexity is affecting time to working silicon, and the impact of geopolitics, with Joseph Sawicki, executive vice president for IC EDA at Siemens Digital Industries Software; John Kibarian, president and CEO of PDF Solutions; John Lee, general manager and vice president of Ansys' Semiconductor Business U... » read more

Blog Review: June 28


In a podcast, Siemens' Spencer Acain discusses the role of AI and machine learning in IC verification and how it could help address noise by analyzing different signals from the diagnosis data to figure out the real root cause of a failure. Synopsys' Ian Land and Ron DiGiuseppe find that designers of aerospace microelectronics are applying lessons and technologies learned from the automotive... » read more

Balancing AI And Engineering Expertise In The Fab


Modeling and simulation are playing increasingly critical roles in chip development due to tighter process specs, shrinking process windows, and fierce competition to bring technologies to market first. Before a new device makes it to high-volume manufacturing, there are countless engineering hours spent on developing the lithography, etching, deposition, CMP, and many other processes, at hi... » read more

Week In Review: Semiconductor Manufacturing, Test


The CHIPS for America team at the U.S. Department of Commerce named the selection committee who will select board members for the nonprofit entity that will likely be managing the National Semiconductor Technology Center (NSTC). Members include John Hennessy, chairman of Alphabet; Jason Matheny, president and CEO of the RAND Corporation; Don Rosenberg, fellow in residence at UCSD’s School of ... » read more

Week In Review: Design, Low Power


AMD plans to spend $135 million in Ireland over four years to boost its adaptive computing segment, formerly Xilinx. The investment will fund R&D projects for next generation AI, data center, networking, and 6G communications infrastructure. The company will also add up to 290 engineering and research positions. Argonne National Laboratory installed the final blade of its Aurora supercom... » read more

Better Choreography Required For Complex Chips


The rapidly growing number of features and options in chip design are forcing engineering teams to ratchet up their planning around who does what, when it gets done, and how various components will interact. In effect, more elements in the design flow need to be choreographed much more precisely. Some steps have to shift further left, while others need to be considered earlier in the plannin... » read more

Blog Review: June 21


Synopsys' Vikram Bhatia identifies four trends driving the migration of EDA tools and chip design workloads to the cloud, from ever-increasing compute and time-to-market demands to advanced cybersecurity features. Cadence's Veena Parthan checks out how computational fluid dynamics and finite element analysis can help improve aquaculture with sustainable fish cage nets that minimize stagnatio... » read more

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