tag: ANSYS

Automotive Complexity, Supply Chain Strength Demands Tech Collaboration
By Ann Mutschler - 30 Aug, 2023 - Comments: 1

The automotive supply chain is becoming more complex and collaborative, changing longstanding relationships between automakers and their suppliers in ways that would have seemed unimaginable even a couple of years ago. Rather than just developing parts for a tightly defined specification, suppliers are taking an increasingly active role in determining how various technologies are combined, w... » read more

Blog Review: August 30
By Jesse Allen - 30 Aug, 2023 - Comments: 0

Siemens' Dan Yu examines hallucinations in large language models, the Universal Approximation Theorem, and the role they play in applying LLMs to EDA. Cadence's Mamta Rana introduces shared flow control in PCIe 6.0, which enables the reduced cost implementation of multiple virtual channels by allowing common sets of resources to be shared. Synopsys' Arturo Salz and Johannes Stahl note tha... » read more

Optimizing IC Designs For Real-World Use Cases
By Brian Bailey - 24 Aug, 2023 - Comments: 0

Semiconductor systems are becoming more focused on power, performance, and area for the primary scenarios they are likely to see in real-world applications, but increasingly at the expense of secondary tasks. This is happening at all levels of abstraction and all stages of the design flow. At the highest level, processors are being optimized to run a given set of software. RISC-V is one of t... » read more

Blog Review: Aug. 23
By Jesse Allen - 23 Aug, 2023 - Comments: 0

Siemens' Stephen Chavez discusses best practices when it comes to thermal analysis for PCB design, including component placement and close collaboration between mechanical and electrical engineering disciplines. Synopsys' Gary Ruggles, Richard Solomon, and Varun Agrawal introduce the Compute Express Link (CXL) specification and how it could help improve latency through computational offloadi... » read more

Blog Review: Aug. 16
By Jesse Allen - 16 Aug, 2023 - Comments: 0

Synopsys' Johannes Stahl and Tim Kogel suggest that multi-die systems require a new approach at the architecture planning phase and why chip designers can’t ignore physical effects such as layout, power, temperature, or IR-drop. Siemens' Rich Edelman argues for using the waveform window in a GUI rather than $display when debugging UVM. Cadence's Paul Scannell stresses the need for diver... » read more

Processor Tradeoffs For AI Workloads
By Ann Mutschler - 10 Aug, 2023 - Comments: 0

AI is forcing fundamental shifts in chips used in data centers and in the tools used to design them, but it also is creating gaps between the speed at which that technology advances and the demands from customers. These shifts started gradually, but they have accelerated and multiplied over the past year with the rollout of ChatGPT and other large language models. There is suddenly much more... » read more

What Is An Integrated Circuit?
By Akanksha Soni - 10 Aug, 2023 - Comments: 0

In our modern world, just about everything is woven together by electronics. From microwaves to satellites, electronics-powered devices are infused into our every waking moment. Today, even our sleep includes digital acoustics, haptics, and analytics. But while the systems that light, connect, and move our lives can vary greatly, nearly every electronic device has one or more of the same fundam... » read more

Blog Review: Aug. 9
By Jesse Allen - 09 Aug, 2023 - Comments: 0

Synopsys' John Swanson and Manmeet Walia note that designing for 224G Ethernet will entail some unique considerations, as design margins will be extremely tight, making it mission-critical to optimize individual analog blocks to reduce impairments. Cadence's Rick Sanborn finds that knowing how best to debug common partitioning-related issues and implicitly control them using common features ... » read more

Ansys Charge Plus And Its Particle-In-Cell Solver
By Ansys - 09 Aug, 2023 - Comments: 0

SIMULATING SEMICONDUCTORS PARTICLE BY PARTICLE Plasma enhanced chemical vapor deposition (PE-CVD) and plasma etching are experimental techniques that leverage multiphysics for product development in the semiconductor industry. PE-CVD explicitly tackles the deposition of material on the surface of a wafer, such as a thin coating. A chemical with free radicals is placed on the surface of the ... » read more

Chiplets: Deep Dive Into Designing, Manufacturing, And Testing
By The SE Staff - 07 Aug, 2023 - Comments: 0

Chiplets are a disruptive technology. They change the way chips are designed, manufactured, tested, packaged, as well as the underlying business relationships and fundamentals. But they also open the door to vast new opportunities for existing chipmakers and startups to create highly customized components and systems for specific use cases and market segments. This LEGO-like approach sounds ... » read more

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