tag: ANSYS

Week In Review: Design, Low Power
By Jesse Allen - 09 Oct, 2020 - Comments: 0

Arm spun out Cerfe Labs to develop and license new types of non-volatile memories based on correlated electron materials (CeRAM) and ferroelectric transistors (FeFETs). Arm CeRAM researchers will join Cerfe Labs and assume ownership of the Arm joint development project with Symetrix Corporation. Read more about the new company and its technology in Cerfe Labs: Spin-On Memory. Tools & IP ... » read more

Sensor Fusion Challenges In Cars
By Ann Mutschler - 08 Oct, 2020 - Comments: 0

The automotive industry is zeroing in on sensor fusion as the best option for dealing with the complexity and reliability needed for increasingly autonomous vehicles, setting the stage for yet another shift in how data from multiple devices is managed and utilized inside a vehicle. The move toward greater autonomy has proved significantly more complicated than anyone expected at first. There... » read more

HW Security Better, But Attack Surface Is Growing
By Ed Sperling - 08 Oct, 2020 - Comments: 0

Semiconductor Engineering sat down to discuss security on chips with Vic Kulkarni, vice president and chief strategist at Ansys; Jason Oberg, CTO and co-founder of Tortuga Logic; Pamela Norton, CEO and founder of Borsetta; Ron Perez, fellow and technical lead for security architecture at Intel; and Tim Whitfield, vice president of strategy at Arm. What follows are excerpts of that conversation,... » read more

Blog Review: Oct. 7
By Jesse Allen - 07 Oct, 2020 - Comments: 0

In a blog for Arm, University of Southampton PhD student Sivert Sliper looks at how energy-driven and intermittent computing could be used to power trillions of IoT devices and introduces a SystemC-based simulator for such systems. Mentor's Chris Spear explains why transaction classes should extend from uvm_sequence_item rather than uvm_transaction when designing UVM testbenches. Cadence'... » read more

Week In Review: Design, Low Power
By Jesse Allen - 02 Oct, 2020 - Comments: 0

Arteris IP will acquire the assets of Magillem Design Services, combining Arteris' NoC interconnect IP with Magillem's chip design and assembly environment. Magillem’s software products will continue to be offered separately from the Arteris interconnect IP offerings and the joined company will continue to execute on Magillem’s existing product and technology roadmaps. Substantially all Mag... » read more

Week In Review: Auto, Security, Pervasive Computing
By SE Staff - 02 Oct, 2020 - Comments: 0

Security Synopsys’ Cybersecurity Research Center disclosed that its research resulted in three Common Vulnerability and Exposures (CVE) advisories on wireless router chipsets that have partial authentication bypass vulnerabilities. The vulnerability lets an attacker send an unencrypted data frame through a WPA2-protected WLAN, which will may respond with an encrypted data frame that the atta... » read more

Blog Review: Sept. 30
By Jesse Allen - 30 Sep, 2020 - Comments: 0

Synopsys' Fred Bals takes a look open source projects that, while popular, go understaffed or underfunded, how that can lead to potential security vulnerabilities, and why users who rely on them should consider stepping up to contribute. In a video, Mentor's Colin Walls explains the basic concepts of multicore systems as it relates to embedded programming. Cadence's Paul McLellan ponders ... » read more

Week In Review: Design, Low Power
By Jesse Allen - 25 Sep, 2020 - Comments: 0

Tools & IP Arm added two new platforms to its product roadmap: the Neoverse V1, and the Neoverse N2, the second-generation N-series platform. The V1 platform supports Scalable Vector Extensions (SVE), provides 50% better single-threaded performance over N1, and targets high-performance cloud, HPC, and machine learning applications. The N2 provides 40% higher single-threaded performance com... » read more

Blog Review: Sept. 23
By Jesse Allen - 23 Sep, 2020 - Comments: 0

Arm's Matthew Mattina introduces a method to reduce the cost of neural network inference by combining both low-precision representation and the complexity-reducing Winograd transform while maintaining accuracy. Cadence's Paul McLellan checks out some of the biggest machine learning systems from Nvidia, Google, and Cerebras that were presented at the recent Hot Chips. Mentor's Robin Bornof... » read more

Custom Designs, Custom Problems
By Ed Sperling - 16 Sep, 2020 - Comments: 0

Semiconductor Engineering sat down to discuss power optimization with Oliver King, CTO at Moortec; João Geada, chief technologist at Ansys; Dino Toffolon, senior vice president of engineering at Synopsys; Bryan Bowyer, director of engineering at Mentor, a Siemens Business; Kiran Burli, senior director of marketing for Arm's Physical Design Group; Kam Kittrell, senior product management group d... » read more

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